Detection technique for digitally altered images
    53.
    发明授权
    Detection technique for digitally altered images 有权
    用于数字改变图像的检测技术

    公开(公告)号:US08260067B2

    公开(公告)日:2012-09-04

    申请号:US12421949

    申请日:2009-04-10

    Inventor: Yun-Qing Shi Bin Li

    CPC classification number: H04N19/60 H04N19/865

    Abstract: Techniques are generally described to determine whether a JPEG image has undergone two compressions. Probabilities can be computed for the first digits of quantized DCT (discrete cosine transform) coefficients from a set of AC (alternate current) modes to detect or determine whether the JPEG image has undergone two compressions. The set of AC modes may include a predetermined number of distinguishable AC modes where a distinguishable AC mode may be an AC mode in which a second quantization step (QS2) is not an integer multiple of the first quantization step (QS1). Classifiers may be created during a training process, and later may be used to assist in determining whether a suspect JPEG image has undergone two compressions. When the classifiers support a multi-classification system, described detection techniques may also be arranged to determine a primary quality factor for the double compressed JPEG image.

    Abstract translation: 通常描述技术来确定JPEG图像是否经历了两次压缩。 可以从一组AC(交替电流)模式的量化DCT(离散余弦变换)系数的第一位计算概率,以检测或确定JPEG图像是否经历了两次压缩。 AC模式的集合可以包括预定数量的可区分AC模式,其中可区分AC模式可以是其中第二量化步长(QS2)不是第一量化步长(QS1)的整数倍的AC模式。 可以在训练过程中创建分类器,并且稍后可以用来帮助确定可疑JPEG图像是否经历了两次压缩。 当分类器支持多分类系统时,还可以安排所描述的检测技术来确定双压缩JPEG图像的主要品质因子。

    High speed dynamic comparative latch

    公开(公告)号:US20120133395A1

    公开(公告)日:2012-05-31

    申请号:US12981514

    申请日:2010-12-30

    Applicant: Bin Li Guosheng Wu

    Inventor: Bin Li Guosheng Wu

    CPC classification number: H03K3/356173 H03K5/249

    Abstract: A dynamic high-speed comparative latch comprises a pre-amplifier unit for enlarging input differential signals, a regenerating latch unit for latching outputted differential signals from the pre-amplifier unit by using a positive feedback, specifically, converting the output of the pre-amplifier unit into a latched result at a first state of a clock cycle, and then retaining the latched result and simultaneously resetting relevant nodes at a second state opposite to the first state of the clock cycle, and a latch unit for outputting the effective outputted value of the regenerating latch unit when the regenerating latch unit being in a retaining state. The pre-amplifier unit is connected with the regenerating latch unit, and the regenerating latch unit is connected with the latch unit. The pre-amplifier unit comprises only one input clock signal. The present invention has a simple structure, and ensures the correctness of the output result of the latch.

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