-
公开(公告)号:US10922556B2
公开(公告)日:2021-02-16
申请号:US15499889
申请日:2017-04-28
Applicant: Intel Corporation
Inventor: Jeremie Dreyfuss , Amit Bleiweiss , Lev Faivishevsky , Tomer Bar-On , Yaniv Fais , Jacob Subag , Eran Ben-Avi , Neta Zmora , Tomer Schwartz
Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to save one or more outputs of a deep learning neural network in a storage system of an autonomous vehicle and upload the one or more outputs to a remote server. Other embodiments are also disclosed and claimed.
-
公开(公告)号:US10853035B2
公开(公告)日:2020-12-01
申请号:US16833128
申请日:2020-03-27
Applicant: Intel Corporation
Inventor: Yaniv Fais , Tomer Bar-On , Jacob Subag , Jeremie Dreyfuss , Lev Faivishevsky , Michael Behar , Amit Bleiweiss , Guy Jacob , Gal Leibovich , Itamar Ben-Ari , Galina Ryvchin , Eyal Yaacoby
Abstract: In an example, an apparatus comprises a plurality of execution units and logic, at least partially including hardware logic, to gate at least one of a multiply unit or an accumulate unit in response to an input of value zero. Other embodiments are also disclosed and claimed.
-
公开(公告)号:US10372416B2
公开(公告)日:2019-08-06
申请号:US15499893
申请日:2017-04-28
Applicant: Intel Corporation
Inventor: Yaniv Fais , Tomer Bar-On , Jacob Subag , Jeremie Dreyfuss , Lev Faivishevsky , Michael Behar , Amit Bleiweiss , Guy Jacob , Gal Leibovich , Itamar Ben-Ari , Galina Ryvchin , Eyal Yaacoby
Abstract: In an example, an apparatus comprises a plurality of execution units and logic, at least partially including hardware logic, to gate at least one of a multiply unit or an accumulate unit in response to an input of value zero. Other embodiments are also disclosed and claimed.
-
公开(公告)号:US20180314934A1
公开(公告)日:2018-11-01
申请号:US15499900
申请日:2017-04-28
Applicant: Intel Corporation
Inventor: Eran Ben-Avi , Neta Zmora , Guy Jacob , Lev Faivishevsky , Jeremie Dreyfuss , Tomer Bar-On , Jacob Subag , Yaniv Fais , Shira Hirsh , Orly Weisel , Zigi Walter , Yarden Oren
Abstract: In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to traverse a solution space, score a plurality of solutions to a scheduling deep learning network execution, and select a preferred solution from the plurality of solutions to implement the deep learning network. Other embodiments are also disclosed and claimed.
-
公开(公告)号:US20180314932A1
公开(公告)日:2018-11-01
申请号:US15499898
申请日:2017-04-28
Applicant: Intel Corporation
Inventor: Tomer Schwartz , Ehud Cohen , Uzi Sarel , Amitai Armon , Yaniv Fais , Lev Faivishevsky , Amit Bleiweiss , Yahav Shadmiy , Jacob Subag
CPC classification number: G06N3/06 , G06N3/0454
Abstract: In an example, an apparatus comprises a plurality of execution units and logic, at least partially including hardware logic, to generate synthetic data for a generative adversarial network (GAN) using the plurality of execution units. Other embodiments are also disclosed and claimed.
-
公开(公告)号:US20180314899A1
公开(公告)日:2018-11-01
申请号:US15499889
申请日:2017-04-28
Applicant: Intel Corporation
Inventor: Jeremie Dreyfuss , Amit Bleiweiss , Lev Faivishevsky , Tomer Bar-On , Yaniv Fais , Jacob Subag , Eran Ben-Avi , Neta Zmora , Tomer Schwartz
Abstract: In an example, an apparatus comprises logic, at least partially including hardware logic, to save one or more outputs of a deep learning neural network in a storage system of an autonomous vehicle and upload the one or more outputs to a remote server. Other embodiments are also disclosed and claimed.
-
57.
公开(公告)号:US20170263040A1
公开(公告)日:2017-09-14
申请号:US15179678
申请日:2016-06-10
Applicant: INTEL CORPORATION
Inventor: Tatiana Surazhsky , Uzi Sarel , Jacob Subag
Abstract: A mechanism is described for facilitating hybrid rendering of graphics images in computing environments. A method of embodiments, as described herein, includes detecting the video stream including two-dimensional (2D) images, where the video stream is processed through a graphics pipeline at a computing device. The method may further include performing hybrid combination of a luma (Y)-plane with chrominance (UV)-planes to directly generate a YUV texture, wherein the YUV texture is used to generate three-dimensional (3D) images corresponding to the 2D images.
-
-
-
-
-
-