公开(公告)号：US07231001B2

公开(公告)日：2007-06-12

申请号：US10436527

申请日：2003-05-13

申请人： Pervez M. Aziz

发明人： Pervez M. Aziz

IPC分类号： H04L25/10 ,  H03L5/00

CPC分类号： H04L25/061

摘要： A read channel component of a magnetic recording system employs equalization of a signal received from the magnetic recording channel, the equalization being modified depending upon the presence or absence of DC shifts in the signal. Equalization corrects for DC shifts, if present, prior to detection and decoding of servo data, such as servo address mark (SAM) and Gray code data. In a first implementation, a DC shift detector detects the presence or absence of DC shifts and modifies equalization in a predetermined manner. In a second implementation, filtering is applied to the signal to enhance equalization in the presence of DC shift, and both filtered and unfiltered signals employed for detection of the servo data.

摘要翻译： 磁记录系统的读通道部件使用从磁记录通道接收的信号的均衡，根据信号中是否存在直流偏移来修正均衡。 在检测和解码伺服数据（如伺服地址标记（SAM））和格雷码数据之前，均衡校正直流偏移（如果存在）。 在第一实施例中，DC移位检测器检测DC偏移的存在或不存在，并以预定方式修改均衡。 在第二实施例中，对信号进行滤波以增强存在DC偏移的均衡，以及用于检测伺服数据的滤波和未滤波信号。

公开(公告)号：US07002767B2

公开(公告)日：2006-02-21

申请号：US10676560

申请日：2003-09-30

申请人： Viswanath Annampedu ,  Pervez M. Aziz

发明人： Viswanath Annampedu ,  Pervez M. Aziz

IPC分类号： G11B20/10

CPC分类号： G11B20/10027 ,  G11B5/59627 ,  G11B20/10009 ,  G11B20/1876

摘要： A repeatable run-out (RRO) detector employs one or more digital interpolators to interpolate asynchronous sample values representing an RRO address mark (AM) and RRO data, and an asynchronous maximum-likelihood (AML) detector to detect the RRO AM. The AML detector selects one of either the asynchronous or interpolated sample sequences that are closest in distance to the ideal RRO AM sample sequence. In addition, a gain value is generated for each of the asynchronous and interpolated sample sequences. Once the RRO AM is detected, the AML detector provides a RRO AM found signal. Gain estimate values for either the selected asynchronous or selected interpolated sample sequences corresponding to the RRO AM found signal are averaged over a predefined number of detection events to generate a best gain error metric (BGEM). The BGEM is employed to adjust the gain of the asynchronous sample sequence.

摘要翻译： 可重复耗尽（RRO）检测器使用一个或多个数字内插器来内插表示RRO地址标记（AM）和RRO数据的异步采样值，以及异步最大似然（AML）检测器来检测RRO AM。 AML检测器选择与理想RRO AM样本序列距离最近的异步或内插样本序列之一。 此外，为每个异步和内插采样序列生成增益值。 一旦检测到RRO AM，AML检测器就会提供一个找到的RRO AM信号。 所选择的异步或选定的内插样本序列的增益估计值对应于RRO AM发现的信号在预定数量的检测事件上进行平均，以产生最佳增益误差度量（BGEM）。 BGEM用于调整异步采样序列的增益。

公开(公告)号：US06480984B1

公开(公告)日：2002-11-12

申请号：US09338104

申请日：1999-06-23

申请人： Pervez M. Aziz

发明人： Pervez M. Aziz

IPC分类号： H03M1341

CPC分类号： G11B20/10287 ,  G11B20/10009 ,  G11B20/10055 ,  G11B20/1426 ,  H03M5/145

摘要： A system for block encoding and block decoding of servo data with a rate (M/N) code, where M is an integer greater than l and N is an integer that is greater than M. Two codes are described for the encoding and decoding processes: a rate (2/6) code and a rate (2/8) code. In general, block encoding and block decoding maps between M servo data bits and N coded symbol bits. Such block encoding with a rate (M/N) code may be employed in a magnetic recording system for encoding servo data that is written to a servo data sector on a magnetic recording medium. Encoded servo data is read from the magnetic medium and block decoded. A forced maximum-likelihood, partial-response (PRML) detector is used to detect the N coded symbol bits from channel samples read from the magnetic medium. Block encoding provides greater coding gain for a detector when the characteristics of the block code are used to improve performance of the PRML detector that is used to detect the N coded symbol bits. Such PRML detector may employ a Viterbi algorithm (VA). State transition decisions over a block of N channel samples, or N clock cycles, form a path through a trellis of the VA, and the characteristics of the block code are used to force decisions for state transitions in the trellis. The PRML detector may force a decision for each state transition based on a priori knowledge of the known valid transitions defined by the rate (M/N) code symbol bits.

摘要翻译： 一种利用速率（M / N）码对伺服数据进行块编码和块解码的系统，其中M是大于1的整数，N是大于M的整数。描述了编码和解码过程的两个代码 ：代码（2/6）和代码（2/8）。 通常，块编码和块解码映射在M个伺服数据位和N个编码符号位之间。 在磁记录系统中可以采用具有速率（M / N）码的这种块编码，用于对写在磁记录介质上的伺服数据扇区的伺服数据进行编码。 编码伺服数据从磁介质读取并进行解码。 使用强制最大似然，部分响应（PRML）检测器来从磁介质读取的信道样本中检测N个编码符号位。 当块代码的特性用于提高用于检测N个编码符号位的PRML检测器的性能时，块编码为检测器提供更大的编码增益。 这种PRML检测器可以采用维特比算法（Viterbi algorithm）。 在N个通道样本块或N个时钟周期上的状态转换决策形成通过VA的网格的路径，并且使用块代码的特征来强制格架中的状态转换的决定。 PRML检测器可以基于由速率（M / N）码符号位定义的已知有效转换的先验知识来强制对每个状态转换的决定。

公开(公告)号：US6130629A

公开(公告)日：2000-10-10

申请号：US205319

申请日：1998-12-04

申请人： Pervez M. Aziz ,  Patrick W. Kempsey ,  Srinivasan Surendran

发明人： Pervez M. Aziz ,  Patrick W. Kempsey ,  Srinivasan Surendran

IPC分类号： G11B20/10 ,  G11B20/14 ,  G11B20/18 ,  H03M7/14 ,  H03M13/00 ,  H03M13/23 ,  H03M13/25 ,  H04L1/00 ,  H04L25/497 ,  H03M7/00

CPC分类号： H04L1/0057 ,  G11B20/1426 ,  H04L1/0041 ,  H04L1/0045 ,  G11B2020/1434 ,  G11B2020/1446 ,  G11B2020/1449

摘要： A system and method employing a rate 24/25 (0,9) code constructed in accordance with a data byte interleaved with a rate 16/17 (0,5) codeword formed from two data bytes limits the number of consecutive zeros seen by a channel to nine. The 16/17 (0,5) codeword is formed from the two data bytes in accordance with a set of pivot bits and a set of corrections for predefined code violations. The additional data byte is interleaved into the 16/17 (0,5) codeword by splitting the byte into a pair of portions and inserting the portions into the 16/17 (0,5) codeword at locations adjacent to predefined ones of the pivot bits. The rate 24/25 (0,9) code is suitable for magnetic or similar recording media and may be employed in partial response maximum likelihood read channels. A feature of the constructed code is a high transition density which allows for more frequent timing and gain control updates, which results in lower required channel input signal to noise ratio for a given channel performance.

摘要翻译： 使用根据与由两个数据字节形成的速率16/17（0.5）码字交织的数据字节构成的速率24/25（0,9）码的系统和方法限制了由 渠道九。 16/17（0,5）码字是根据一组枢轴比特和一组用于预定义代码违例的校正从两个数据字节形成的。 通过将该字节分割成一对部分并将这些部分插入邻近预定义枢纽的位置的16/17（0,5）码字中，附加数据字节被交织到16/17（0,5）码字中 位。 速率24/25（0,9）代码适用于磁性或类似的记录介质，并可用于部分响应最大似然读取通道。 构造的代码的特征是高转换密度，其允许更频繁的定时和增益控制更新，这导致给定信道性能所需的信道输入信噪比更低。