摘要:
A receiver may comprise a complex mixer for converting the modulated signal to a complex modulated signal comprising a first in-phase component and a first quadrature component. The receiver may further comprise a digital demodulator. The digital demodulator may comprise at least one processor circuit programmed for applying a phase differencer for generating an output function in terms of a phase difference of the complex modulated signal. Applying the phase differencer may comprise converting the first in-phase component to a function of a phase difference of the first in-phase component expressed in digital time, and converting the first quadrature component to a function of the phase difference of the first quadrature component expressed in digital time. The at least one processor circuit of the digital demodulator may also be programmed for applying a four quadrant inverse tangent to the output function to generate the information signal.
摘要:
Various embodiments of the invention are directed to methods and systems for multi transform OFDM transmitter and receivers with low peak to average power ratio (PAPR) signals, that have high bandwidth efficiency and are computational efficient. For example, various embodiments of the transmitter may utilize an architecture comprised of a baseband modulator, a serial to parallel converter, a bank of multiplicity NT orthonormal transforms unit, a bank of multiplicity NT inverse Fourier transforms unit, a dummy symbols generator, and a minimum PAPR evaluation unit for finding the optimum transform index n0. Various embodiments of the receiver may comprise of a transform index detection unit for the detection of the transform index imbedded in the OFDM signal.
摘要:
Various embodiments are directed to systems and methods for processing signals comprising a first component and a second component. A bandwidth of the first component may be centered at a center frequency. A bandwidth of the second component may be offset from the center frequency by an offset frequency such that at least a portion of the bandwidth of the second component overlaps a skirt of the first component. In various embodiments, a transmitter may split a single signal to generate the first and second components, shift the frequency of the second component, recombine and transmit the two components. Also, in various embodiments, a receiver may receive the signal and derive the first and second components by correcting for cross-interference.
摘要:
A method for pre-processing a signal prior to receipt of the signal by a non-linear device (NLD) to compensate for AM-AM distortion and AM-PM distortion of the signal by the NLD. The method includes generating a modified amplitude rk based on an amplitude xk derived from a digitized envelope Ri,k of the signal, generating a scale factor ck based on the modified amplitude rk and the amplitude xk, generating an AM-AM compensated signal based on the scale factor ck, generating a first AM-PM phase compensation value based on the modified amplitude rk, and generating an AM-AM and AM-PM compensated signal by modifying a phase of the AM-AM compensated signal based on the first AM-PM phase compensation value.
摘要:
A docking display unit for physically engaging a portable computing unit and a combination of the same. The display unit may include or exclude a central processing unit and includes a housing with a hinged first and second region. The first region includes a display screen and the second region includes a keyboard. A recessed docking port is provided in the second region and is configured to receive the portable device therein. At least one connector is provided in the docking port to operationally link a central processor in the portable device with the display screen and keyboard. A touchscreen on the portable device provides a user interface for controlling the combined display unit and portable device. The portable device preferably is a smartphone.
摘要:
A RF receiver that comprises: (i) a complex mixer for converting a version of the RF signal to a complex baseband signal comprising an in-phase component and a quadrature component; (ii) one or more analog-to-digital converters (ADCs) connected to the complex mixer for digitizing the in-phase component and the quadrature component of the complex baseband signal; and (iii) a digital signal processor (DSP) connected the one or more ADCs. The DSP is programmed to mitigate interference in the complex baseband signal by a process that comprises the steps of: (i) performing at least one cross correlation operation involving L-length segments of the digitized in-phase and quadrature components of the complex baseband signal; and (ii) concatenating the cross-correlated L-length segments of the digitized in-phase and quadrature components of the complex baseband signal to produce digitized interference mitigated in-phase and quadrature components of the complex baseband signal.
摘要:
A grid computing system for managing utility service content. A grid computing system comprises at least one node for storing utility service content and a repository for storing user profiles that define respective portions of the utility service content. The grid computing system further comprises a grid distributed resource manager coupled to the node storing the utility service content and the repository storing user profiles. The grid distributed resource manager is operable to access a requested portion of the utility service content from the node based on a received user profile.
摘要:
A receiver may comprise a complex mixer for converting the modulated signal to a complex modulated signal comprising a first in-phase component and a first quadrature component. The receiver may further comprise a digital demodulator. The digital demodulator may comprise at least one processor circuit programmed for applying a phase differencer for generating an output function in terms of a phase difference of the complex modulated signal. Applying the phase differencer may comprise converting the first in-phase component to a function of a phase difference of the first in-phase component expressed in digital time, and converting the first quadrature component to a function of the phase difference of the first quadrature component expressed in digital time. The at least one processor circuit of the digital demodulator may also be programmed for applying a four quadrant inverse tangent to the output function to generate the information signal.
摘要:
A FIFO memory circuit is for interfacing between circuits with different clock domains. The circuit has a FIFO memory (10), a write pointer circuit (16) clocked by the clock of a first clock domain and controlling the memory location to which data is written, and a read pointer circuit clocked by the clock of a second clock domain and controlling the memory location from which data is read. The read and write pointer circuits use gray coding. The memory circuit further comprises a duplicate write pointer circuit (30) which has its write pointer address incremented synchronously with the write pointer circuit (16), and which has a starting write address selected such that the duplicate write pointer address lags behind the write pointer address circuit by a number of address locations corresponding to the size of the FIFO memory (10). A comparator (34) compares the read pointer circuit address with the duplicate write pointer circuit address for determining a full status of the FIFO memory.
摘要:
The present invention relates in general to portable processor based devices that provide computing, communication or entertainment functionality. More particularly, the present invention pertains to portable processor based devices operable while being held in its user's hand and providing communications, organizer and/or entertainment functions, such as cellular telephones, palm-sized organizers, and MP3 players, and to portable processor based devices providing general computing capabilities, such as laptop or handheld personal computers (PCs). More specifically, the present invention relates to systems that detachably mate a plurality of portable processor based devices to provide their combined functionality in an integrated structure.