公开(公告)号：US09029978B2

公开(公告)日：2015-05-12

申请号：US13456079

申请日：2012-04-25

申请人： Ting Cheong Ang

发明人： Ting Cheong Ang

IPC分类号： H01L29/00 ,  H01L21/762

CPC分类号： H01L21/76224

摘要： A semiconductor structure includes a semiconductor substrate with a substrate region and a trench extending into the surface region of the semiconductor substrate. The trench includes sidewalls, a bottom and a depth. The semiconductor structure further includes a trench liner overlying the bottom and the sidewalls of the trench. The semiconductor structure also includes a shallow trench isolation structure filling at least the depth of the trench. The shallow trench isolation structure is formed from alternating layers of silicon nitride and high-density plasma oxide.

摘要翻译： 半导体结构包括具有衬底区域的半导体衬底和延伸到半导体衬底的表面区域中的沟槽。 沟槽包括侧壁，底部和深度。 半导体结构还包括覆盖沟槽的底部和侧壁的沟槽衬垫。 半导体结构还包括至少填充沟槽的深度的浅沟槽隔离结构。 浅沟槽隔离结构由氮化硅和高密度等离子体氧化物的交替层形成。

公开(公告)号：US08309456B2

公开(公告)日：2012-11-13

申请号：US11249141

申请日：2005-10-11

申请人： Ting Cheong Ang

发明人： Ting Cheong Ang

IPC分类号： H01L29/04

CPC分类号： H01L21/76814 ,  H01L21/02063 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76865 ,  H01L21/76871

摘要： A method for making an electrode in a semiconductor device. The method includes forming a trench in a first layer. The first layer is associated with a top surface, and the trench is associated with a bottom surface and a side surface. Additionally, the method includes depositing a diffusion barrier layer on at least the bottom surface, the side surface, and a part of the top surface, removing the diffusion barrier layer from at least a part of the bottom surface, depositing a seed layer on at least the part of the bottom surface and the diffusion barrier layer, and depositing an electrode layer on the seed layer.

摘要翻译： 一种在半导体器件中制造电极的方法。 该方法包括在第一层中形成沟槽。 第一层与顶表面相关联，并且沟槽与底表面和侧表面相关联。 此外，该方法包括在至少底表面，侧表面和顶表面的一部分上沉积扩散阻挡层，从底表面的至少一部分去除扩散阻挡层，将种子层沉积在 至少部分底表面和扩散阻挡层，以及在种子层上沉积电极层。

公开(公告)号：US07989309B2

公开(公告)日：2011-08-02

申请号：US11549116

申请日：2006-10-13

申请人： Ting Cheong Ang

发明人： Ting Cheong Ang

IPC分类号： H01L21/76

CPC分类号： H01L21/76232

摘要： A method of forming a graded trench for a shallow trench isolation region is provided. The method includes providing a semiconductor substrate with a substrate region. The method further includes forming a pad oxide layer overlying the substrate region. Additionally, the method includes forming an etch stop layer overlying the pad oxide layer. The method further includes patterning the etch stop layer and the pad oxide layer to expose a portion of the substrate region. In addition, the method includes forming a trench within an exposed portion of the substrate region, the trench having sidewalls and a bottom and a first depth. The method additionally includes forming a dielectric layer overlying the trench sidewalls, the trench bottom, and mesa regions adjacent to the trench. The method further includes etching the substrate region to increase the depth of at least a portion of the trench to a second depth.

摘要翻译： 提供了形成浅沟槽隔离区域的分级沟槽的方法。 该方法包括提供具有衬底区域的半导体衬底。 该方法还包括形成覆盖衬底区域的衬垫氧化物层。 另外，该方法包括形成覆盖衬垫氧化物层的蚀刻停止层。 该方法还包括图案化蚀刻停止层和衬垫氧化物层以暴露衬底区域的一部分。 此外，该方法包括在衬底区域的暴露部分内形成沟槽，沟槽具有侧壁和底部以及第一深度。 该方法另外包括形成覆盖沟槽侧壁，沟槽底部和与沟槽相邻的台面区域的介电层。 该方法还包括蚀刻衬底区域以将沟槽的至少一部分的深度增加到第二深度。