公开(公告)号：US4802134A

公开(公告)日：1989-01-31

申请号：US944115

申请日：1986-12-22

申请人： Akira Tsujimoto

发明人： Akira Tsujimoto

IPC分类号： G11C7/00 ,  G11C7/10 ,  G11C11/401 ,  G11C11/407 ,  G11C11/4096 ,  G11C11/413 ,  G11C8/00 ,  G11C11/40

CPC分类号： G11C11/4096 ,  G11C7/103

摘要： A semiconductor memory of the type that a plurality of memory locations are sequentially addressed in synchronism with a chain of clock pulses without externally applied address signals is disclosed. The memory is provided with a detection circuit for detecting a selection of a predetermined memory location and thus it is allowed for user to know which memory location has been addressed.

摘要翻译： 公开了一种半导体存储器，其中多个存储器位置与没有外部施加的地址信号的时钟脉冲链同步地顺序寻址。 存储器设置有用于检测预定存储器位置的选择的检测电路，因此允许用户知道哪个存储器位置已被寻址。