公开(公告)号：US12046176B2

公开(公告)日：2024-07-23

申请号：US18198076

申请日：2023-05-16

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Qingjun Lai ,  Yihua Zhu ,  Yong Yuan ,  Ping An ,  Zhaokeng Cao

IPC: G09G3/20 ,  G11C19/20 ,  G11C19/28 ,  G09G3/3266

CPC classification number: G09G3/20 ,  G11C19/20 ,  G11C19/28 ,  G09G3/3266 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0286 ,  G09G2310/061 ,  G09G2310/08

Abstract: A display panel includes a shift register, a pixel circuit, and a driving circuit. The shift register includes a first control unit, a second control unit, a third control unit, and a fourth control unit. The first control unit is configured to receive an input signal and control a signal of a first node in response to a first clock signal. The second control unit is configured to receive a first voltage signal and control a signal of a second node in response to the input signal and the first clock signal. The third control unit is configured to receive the first voltage signal and a second voltage signal and control a signal of a fourth node in response to the signal of the second node and a signal of a third node.

公开(公告)号：US11990085B2

公开(公告)日：2024-05-21

申请号：US17991375

申请日：2022-11-21

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Yong Yuan ,  Jieliang Li

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0278 ,  G09G2310/062 ,  G09G2310/08 ,  G09G2320/045

Abstract: A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a driving module, a data-writing module, and a compensation module, and a reset module. The driving module includes a driving transistor. The data-writing module is connected to a source of the driving transistor and configured to selectively provide a data signal for the driving transistor. The compensation module is connected between a gate and a drain of the driving transistor. The reset module is connected between the drain of the driving transistor and a reset signal terminal and configured to provide a reset signal for the gate of the driving transistor. The reset module is used as a bias module. An operating process of the pixel circuit includes a reset stage and a bias stage.

公开(公告)号：US11908390B2

公开(公告)日：2024-02-20

申请号：US17994597

申请日：2022-11-28

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Yong Yuan

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2300/043 ,  G09G2300/0819 ,  G09G2320/0233 ,  G09G2320/045

Abstract: Provided are a display panel and a display device. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data write module, a drive module, a compensation module and a reset module. The drive module includes a drive transistor. The data write module is connected between a data signal input terminal and a source of the drive transistor. The compensation module is connected between a gate of the drive transistor and the drain of the drive transistor. The rest module is connected between a reset signal terminal and the drain of the drive transistor. The reset module also serves as a bias module. An operation of the pixel circuit includes a reset stage and a bias stage, during the reset stage, the reset module and the compensation module are on.

公开(公告)号：US11837136B2

公开(公告)日：2023-12-05

申请号：US18115476

申请日：2023-02-28

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Yong Yuan

IPC: G09G3/20 ,  G11C19/28

CPC classification number: G09G3/20 ,  G11C19/287 ,  G09G2300/08 ,  G09G2310/0243 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/02

Abstract: Provided are a display panel and display device. The display panel includes a driver circuit comprising a shift register that is N-stage cascaded; wherein the shift register comprises: a third control unit configured to receive a first voltage signal and generate an output signal in response to a signal of a third node, or receive a second voltage signal and generate an output signal in response to a signal of a second node; and a fourth control comprising a first capacitor and a first transistor, wherein a second plate of the first capacitor is connected to a drain of the first transistor, a first plate of the first capacitor and a gate of the first transistor are connected to a same node; and/or a first plate of the first capacitor and a gate of the first transistor receive a same signal.

公开(公告)号：US11837135B2

公开(公告)日：2023-12-05

申请号：US18115445

申请日：2023-02-28

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Yong Yuan

IPC: G09G3/20 ,  G11C19/28

CPC classification number: G09G3/20 ,  G11C19/287 ,  G09G2300/08 ,  G09G2310/0243 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/02

Abstract: Provided are a display panel and display device. The display panel includes a driver circuit comprising a shift register that is N-stage cascaded; wherein the shift register comprises: a third control unit configured to receive a first voltage signal and generate an output signal in response to a signal of a third node, or receive a second voltage signal and generate an output signal in response to a signal of a second node; and a fourth control comprising a first capacitor and a first transistor, wherein a second plate of the first capacitor is connected to a drain of the first transistor, a source of the first transistor receives a first control signal, and a gate of the first transistor receives a second control signal.

公开(公告)号：US11676522B2

公开(公告)日：2023-06-13

申请号：US17451687

申请日：2021-10-21

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Qingjun Lai ,  Yihua Zhu ,  Yong Yuan ,  Ping An ,  Zhaokeng Cao

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2310/0286

Abstract: A display panel and a display device are provided. A shift register of the display panel includes a first control unit, configured to receive an input signal and control a signal of a first node in response to a first clock signal; a second control unit, configured to receive a first voltage signal and control a signal of a second node in response to the input signal and the first clock signal; a third control unit, configured to receive the first voltage signal and a second voltage signal and control a signal of a fourth node in response to the signal of the second node and a signal of a third node; and a fourth control unit, configured to receive a third voltage signal and a fourth voltage signal and generate an output signal in response to the signals of the second node and the fourth node.

公开(公告)号：US11538401B2

公开(公告)日：2022-12-27

申请号：US17405993

申请日：2021-08-18

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Yong Yuan

IPC: G09G3/32

Abstract: Provided are a display panel, a driving method thereof and a display device. The display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data write module, a drive module and a compensation module. The data write module is configured to selectively provide a data signal for the drive module. The drive module is configured to provide a drive current for the light-emitting element and includes a drive transistor. The compensation module is configured to compensate for the threshold voltage of the drive transistor. The operation of the pixel circuit includes a bias stage. During the bias stage, the data write module and the drive module are on, the compensation module is off, and the data signal is written to the drain of the drive transistor to adjust the bias state of the drive transistor.

公开(公告)号：US11430365B2

公开(公告)日：2022-08-30

申请号：US17520520

申请日：2021-11-05

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Yong Yuan

IPC: G09G3/20 ,  G11C19/28

Abstract: Provided are a display panel and display device. The display panel includes a driver circuit, where the driver circuit includes an N-stage cascaded shift register which includes a first control unit, a second control unit, a third control unit, and a fourth control unit. The first control unit is configured to receive an input signal and control a signal of a first node in response to a first clock signal. The second control unit is configured to control a signal of a second node. The third control unit is configured to receive the first voltage signal and generate an output signal in response to a signal of a third node, or receive the second voltage signal and generate an output signal in response to the signal of the second node. The fourth control unit is connected to the third node.

公开(公告)号：US20220076611A1

公开(公告)日：2022-03-10

申请号：US17528165

申请日：2021-11-16

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Qingjun Lai ,  Yihua Zhu ,  Yong Yuan

IPC: G09G3/20

Abstract: Provided are a display panel and a display device. The display panel includes a driver circuit including N stages of cascaded shift registers, where N≥2. Each shift register includes a first control part and a second control part. The second control part includes a first control unit and a second control unit. The first control unit is configured to receive a signal of a preset node and a first output control signal and control a signal of a fourth node, where the preset node is one of a second node or a third node. A first output control signal received by a shift register at an M1-th stage is a signal of the preset node of a shift register at an M2-th stage, where 1≤M1≤N, 1≤M2≤N, 1≤|M1−M2|≤i, and 2≤i≤N−1.

公开(公告)号：US11107839B2

公开(公告)日：2021-08-31

申请号：US16701179

申请日：2019-12-03

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Yong Yuan

IPC: H01L27/00 ,  H01L27/12 ,  H01L29/417 ,  H01L29/786

Abstract: Provided are an array substrate, a manufacturing method thereof, and a display panel. The array substrate includes: a substrate, a first active layer of a first thin film transistor, a first insulating layer, a first metal layer, and a second active layer of a second thin film transistor. The first metal layer includes a first connection portion, which overlaps one of a source contact region or a drain contact region of the first active layer and overlaps one of a source contact region or a drain contact region of the second active layer. The one of the source contact region or the drain contact region of the first active layer and the one of the source contact region or the drain contact region of the second active layer overlap each other, and are electrically connected through a via in the first insulating layer and the first connection portion.