公开(公告)号：US20030072026A1

公开(公告)日：2003-04-17

申请号：US09976124

申请日：2001-10-11

Applicant: Eastman Kodak Company

Inventor： Carl J. Tesavis ,  Christopher D. Larson ,  Arthur N. Nielsen ,  James R. Pamper

IPC: G06F003/05 ,  G06F009/02 ,  H04N001/40

CPC classification number: H04N1/00973 ,  H04N1/00

Abstract: A system for permitting insertion or replacement of electronic cards, the system includes a scanner for scanning hardcopy elements, the scanner including an electronic component for performing at least one processing function on an electronic representation of the hardcopy element; a first processor for directing operations of the scanner and for receiving directions that are passed to other components; a field-installed electronic card that performs additional processing on the electronic representation of the hardcopy element; a second processor electrically connected to the scanner for sending directions to the scanner processor which processor includes field-installed control code for directing the field-installed electronic card.

Abstract translation: 一种用于允许插入或更换电子卡的系统，该系统包括用于扫描硬拷贝元件的扫描器，扫描器包括用于对硬拷贝元件的电子表示执行至少一个处理功能的电子部件; 用于指导扫描器的操作并且用于接收传递到其他部件的指示的第一处理器; 一种现场安装的电子卡，用于对硬拷贝元件的电子表示进行附加处理; 电连接到扫描器的第二处理器，用于向扫描仪处理器发送指令，该处理器包括用于指示现场安装的电子卡的现场安装的控制代码。

公开(公告)号：US20020126705A1

公开(公告)日：2002-09-12

申请号：US09976765

申请日：2001-10-12

Inventor： Paul R. Gentieu ,  Tom Acquistapace ,  Farhad Iryami

IPC: G06F003/00 ,  G06F003/02 ,  G06F003/023 ,  G06F003/05 ,  G06F003/06 ,  G06F005/00 ,  G06F009/30 ,  G06F009/40 ,  G06F015/00

CPC classification number: G06F9/3001 ,  G06F9/30021 ,  G06F9/30058 ,  G06F9/3867 ,  H04L69/08

Abstract: A synchronous network traffic processor that synchronously processes, analyzes and generates data for high-speed network protocols, on a wire-speed, word-by-word basis. The synchronous network processor is protocol independent and may be programmed to convert protocols on the fly. An embodiment of the synchronous network processor described has a low gate count and can be easily implemented using programmable logic. An appropriately programmed synchronous network traffic processor may replace modules traditionally implemented with hard-wired logic or ASIC.

Abstract translation: 同步网络流量处理器，以线速逐行的方式同步处理，分析和生成高速网络协议的数据。 同步网络处理器是独立于协议的，可以编程为即时转换协议。 所描述的同步网络处理器的实施例具有低门控数量，并且可以使用可编程逻辑容易地实现。 适当编程的同步网络流量处理器可以替代传统上用硬连线逻辑或ASIC实现的模块。

公开(公告)号：US20020099840A1

公开(公告)日：2002-07-25

申请号：US09732084

申请日：2000-12-06

Inventor： Daniel J. Miller ,  Eric H. Rudolph

IPC: G06F003/02 ,  G06F003/023 ,  G06F003/05 ,  G06F003/06 ,  G06F005/00 ,  G06F015/16 ,  G06F015/163 ,  G06F009/46

CPC classification number: H04L29/06027

Abstract: A software enabled, matrix switch is presented wherein a scalable plurality of inputs, coupled to media content sources, provide media content which is recursively routed through select media processing object(s) coupled to a scalable plurality of matrix switch outputs in accordance with a user-defined media processing project.

Abstract translation: 提供了一种启用软件的矩阵切换，其中耦合到媒体内容源的可伸缩多个输入提供媒体内容，该媒体内容根据用户被递归地路由选择媒体处理对象，该选择媒体处理对象耦合到可伸缩的多个矩阵切换输出 定义媒体处理项目。

公开(公告)号：US20020091878A1

公开(公告)日：2002-07-11

申请号：US09881767

申请日：2001-06-18

Inventor： Hyun-Jun Lee

IPC: G06F003/00 ,  G06F003/02 ,  G06F003/023 ,  G06F003/05 ,  G06F003/06 ,  G06F005/00

CPC classification number: G06F3/1222 ,  G06F3/1238 ,  G06F3/1285 ,  H04N1/00225 ,  H04N1/00233 ,  H04N1/32005 ,  H04N1/4413 ,  H04N1/444 ,  H04N2201/0067 ,  H04N2201/0068 ,  H04N2201/0094

Abstract: A multi-function apparatus and method for receiving and printing an electronic letter is provided for a plurality of users. An electronic letter receiver converts received data from a mail server into image and character data and outputs the image and character data. A letter storing unit sorts and stores the image and character data by the users' accounts. A display unit displays information extracted from the image and character data. A user interface unit outputs a display requesting signal when an authorized user requests to view letters for the user and outputs an account control signal having information selected by the authorized user from the displayed information. A controller stores the image and character data received from the electronic letter receiver in the letter storing unit, outputs the stored image and character data to the display unit in response to the display requesting signal, reads image and character data, which is selected from among the stored image and character data based on the account control signal, from the letter storing unit, and outputs the read image and character data together with a printing control signal. A printer prints letters corresponding to the data selectively read by the controller, in response to the printing control signal.

Abstract translation: 为多个用户提供了一种用于接收和打印电子信的多功能设备和方法。 电子信函接收机将接收到的数据从邮件服务器转换为图像和字符数据，并输出图像和字符数据。 字母存储单元通过用户的帐户对图像和字符数据进行排序和存储。 显示单元显示从图像和字符数据提取的信息。 用户界面单元当授权用户请求查看用户的字母时输出显示请求信号，并从显示的信息中输出具有由授权用户选择的信息的帐户控制信号。 控制器将从电子信函接收器接收到的图像和字符数据存储在字母存储单元中，响应于显示请求信号将存储的图像和字符数据输出到显示单元，读取图像和字符数据， 存储的图像和基于帐户控制信号的字符数据，从字母存储单元输出读取的图像和字符数据以及打印控制信号。 打印机响应于打印控制信号，打印与控制器有选择读取的数据对应的字母。

公开(公告)号：US20020046307A1

公开(公告)日：2002-04-18

申请号：US09788326

申请日：2001-02-16

Inventor： Ronald Thomas Treggiden

IPC: G06F003/02 ,  G06F003/00 ,  G06F003/023 ,  G06F003/05

CPC classification number: G06F5/065

Abstract: A direct memory access (DMA) first-in-first-out (FIFO) buffer includes two FIFO devices connected in parallel. An output multiplexer is controlled by a controller to pass to its output data provided by a selected one of the FIFO devices. Data is clocked into one FIFO device until it is full, after which data may be written from it. When data is written from a FIFO device, the FIFO device is emptied before data is again read into it. Using this arrangement, data can be read into one FIFO device whilst data is written from the other FIFO device.

Abstract translation: 直接存储器访问（DMA）先进先出（FIFO）缓冲器包括并联连接的两个FIFO器件。 输出多路复用器由控制器控制以传递到由FIFO设备中选定的一个提供的其输出数据。 数据被计时到一个FIFO设备，直到它已满，之后可以从中写入数据。 当从FIFO设备写入数据时，在再次读入数据之前先清空FIFO设备。 使用这种布置，数据可以被读入一个FIFO设备，而数据从另一FIFO设备写入。

公开(公告)号：US20010014924A1

公开(公告)日：2001-08-16

申请号：US09767963

申请日：2001-01-24

Inventor： Kaneyuki Nishihara

IPC: G06F003/00 ,  G06F003/02 ,  G06F005/00 ,  G06F003/06 ,  G06F003/05 ,  G06F003/023

CPC classification number: H04J3/0632

Abstract: An apparatus allowing stable and reliable voice communication between a computer and a network without generating noise due to slips of voice data is disclosed. A FIFO memory section temporarily stores voice data. A clock converter performs a clock conversion between the computer and the network according to a controlled clock signal and a network-extracted clock signal. The amount of data stored in the FIFO memory section is monitored. A frequency of the controlled clock signal is changed depending on the amount of data stored in the FIFO memory section so that the voice data is continuously transferred.

Abstract translation: 公开了一种允许计算机和网络之间的稳定和可靠的语音通信而不会由于语音数据的滑移而产生噪声的装置。 FIFO存储器部分临时存储语音数据。 时钟转换器根据受控时钟信号和网络提取的时钟信号在计算机和网络之间执行时钟转换。 监视存储在FIFO存储器部分中的数据量。 受控时钟信号的频率根据存储在FIFO存储器部分中的数据量而改变，使得语音数据被连续传送。