公开(公告)号：US06345011B2

公开(公告)日：2002-02-05

申请号：US09758526

申请日：2001-01-10

Applicant: Jae-Hoon Joo ,  Sang-Seok Kang ,  Jong-Hyun Choi ,  Yun-Sang Lee

Inventor： Jae-Hoon Joo ,  Sang-Seok Kang ,  Jong-Hyun Choi ,  Yun-Sang Lee

IPC: G11C800

CPC classification number: G11C7/10

Abstract: A semiconductor memory device including a plurality of memory blocks having associated with one or more circuit blocks therearound, and a plurality of input/output lines associated with the memory blocks, is disclosed. The input/output lines are divided into at least a first group and a second group. First portions of the input/output lines of the first group are arranged between the adjacent memory blocks while first portions of the input/output lines of the second group are arranged within the circuit blocks around the adjacent memory blocks. Second portions of the input/output lines of the first group are arranged on the circuits blocks around the memory blocks while second portions of the input/output lines of the second group are arranged between the adjacent memory blocks.

Abstract translation: 公开了一种包括与其周围的一个或多个电路块相关联的多个存储块的半导体存储器件，以及与存储器块相关联的多个输入/输出线。 输入/输出线分成至少第一组和第二组。 第一组的输入/输出线的第一部分被布置在相邻的存储块之间，而第二组的输入/输出线的第一部分被布置在邻近的存储块周围的电路块内。 第一组的输入/输出线的第二部分布置在存储块周围的电路块上，而第二组的输入/输出线的第二部分被布置在相邻的存储块之间。