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公开(公告)号:US20220305246A1
公开(公告)日:2022-09-29
申请号:US17807224
申请日:2022-06-16
Inventor: Yongchun LU , Hui LI , Pan LI , Chunping LONG
Abstract: A preparation delivery assembly includes: a first substrate, a second substrate, and at least two needles of different lengths. Two side walls are provided between the first and second substrates to define a first chamber. At least one first channel that is in communication with the first chamber is provided in the second substrate in a direction perpendicular to the second substrate. And the needles are arranged on a surface of the second substrate, and each needle is in communication with the first chamber to deliver the preparation. A third channel is provided in the first substrate in a direction perpendicular to the first substrate, and one end of the third channel is in communication with the first chamber so as to guide the preparation introduced from the other end of the third channel into the first chamber.
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62.
公开(公告)号:US20210333675A1
公开(公告)日:2021-10-28
申请号:US16343964
申请日:2018-09-27
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Chunping LONG , Xinyin WU , Yong QIAO
IPC: G02F1/1362 , G02F1/1368
Abstract: Provided are an array substrate and a method for manufacturing the same, a display device and a method for manufacturing the same. In the array substrate, the drain of the thin film transistor is extended to form a drain extension line, wherein the drain extension line is between adjacent sub-pixel units of the pixel region, thus it can block the light at the boundary between the sub-pixel units, thereby avoiding light leakage duo to the disordered electric field at the boundary between the sub-pixel units. The array substrate of the present disclosure is suitable for a multi-domain oriented IPS mode array substrate. The drain extension line can be used as a light blocking strip to prevent light leakage due to the disordered electric field at the boundary between the sub-pixels, and is overlapped with the middle portion of the common electrode line to form a storage capacitor.
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公开(公告)号:US20210257440A1
公开(公告)日:2021-08-19
申请号:US16981734
申请日:2020-04-01
Applicant: BOE Technology Group Co., Ltd.
Inventor: Chunping LONG , Hui LI
IPC: H01L27/32
Abstract: The disclosure discloses an array substrate, a display panel, and a display device. A first power signal line is configured to be formed by electrically connecting a first signal line located in a first source-drain metal layer and a second signal line located in a second source-drain metal layer through a via hole, which is equivalent to that the first power signal line is composed of the first signal line and the second signal line connected in parallel, and the equivalent resistance of the parallel-connected first signal line and second signal line included in the first power signal line is smaller than the resistance of any of the signal lines. Thus, the resistance of the first power signal line may be effectively reduced, so that an IR drop of a display panel with an array substrate may be reduced, and the display uniformity of the display panel is improved.
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公开(公告)号:US20210223650A1
公开(公告)日:2021-07-22
申请号:US16765276
申请日:2019-12-05
Applicant: BOE Technology Group Co., Ltd.
Inventor: Chunping LONG
IPC: G02F1/1362 , H01L27/12 , G02F1/1333 , G02F1/1343 , G06F3/041
Abstract: An array substrate and a display device are provided. The array substrate includes a substrate, which has a display area and a periphery wiring area at the outer side of the display area of the substrate; at least one periphery wiring in the periphery wiring area; an insulating layer on a side of the periphery wiring away from the substrate, wherein a plurality of grooves is formed in the insulating layer in region corresponding to the periphery wiring area, so as to form a barrier wall with the grooves; and a conductive shielding layer on one side of the insulating layer, an orthographic projection of portions, directly facing the grooves, of the periphery wiring on the substrate is within an orthographic projection of the conductive shielding layer on the substrate.
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公开(公告)号:US20210173271A1
公开(公告)日:2021-06-10
申请号:US16326474
申请日:2018-05-22
Applicant: BOE Technology Group Co., Ltd.
Inventor: Chunping LONG , Yongda MA , Jian XU
IPC: G02F1/1362 , G02F1/1368 , H01L27/12
Abstract: Disclosed are a display substrate, a display panel, a display device. The display substrate includes pixel units on a substrate in form of array, gate lines in one-to-one correspondence to each row of pixel units, data lines between any two adjacent columns of pixel units and on sides, far away from the substrate, of gate lines, each pixel unit includes a pixel electrode, a thin film transistor configured to control the pixel electrode; each data line includes curved data line parts between any two pixel units, whose row directions are adjacent to each other, in two columns of pixel units on two sides of data line; each data line part includes a first part covered by a pixel electrode of pixel unit on one side of the data line part, a second part covered by a pixel electrode of pixel unit on the other side of the data line part.
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公开(公告)号:US20210159343A1
公开(公告)日:2021-05-27
申请号:US16642820
申请日:2019-05-31
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Chunping LONG
IPC: H01L29/786 , H01L27/12
Abstract: A thin film transistor, an array substrate, a display panel and a display device are provided, which is related to the field of display technologies. A thin film transistor comprises: a substrate; at least two active layers on the substrate, each active layer comprising a first terminal and a second terminal opposite to each other; a source and a drain above the substrate. The first terminal of each of the at least two active layers is electrically connected to the source, and the second terminal of each of the at least two active layers is electrically connected to the drain, and the at least two active layers are arranged on an upper surface of the substrate and separated from one another.
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公开(公告)号:US20210028247A1
公开(公告)日:2021-01-28
申请号:US16649942
申请日:2019-10-14
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Chunping LONG
IPC: H01L27/32
Abstract: A pixel structure includes a plurality of pixels, and each of the plurality of pixels includes at least one green sub-pixel and at least one other color sub-pixel. A display region determined by the plurality of pixels includes a main display region and at least one special-shaped display region. A boundary of the at least one special-shaped display region includes an arc-shaped edge. The plurality of pixels include a plurality of pixels disposed in the main display region and a plurality of pixels disposed in the at least one special-shaped display region. In each pixel disposed at a corresponding position of the arc-shaped edge, the at least one green sub-pixel is disposed at a side of the at least one other color sub-pixel proximate to the arc-shaped edge.
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公开(公告)号:US20200294446A1
公开(公告)日:2020-09-17
申请号:US16768555
申请日:2019-11-08
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Chunping LONG
IPC: G09G3/3225 , H01L27/32
Abstract: The present disclosure provides a display substrate and a method for manufacturing the same, and a display device. The display substrate includes: a base substrate; a first pattern layer, a second pattern layer and a third pattern layer on the base substrate, the third pattern layer is arranged on the base substrate, the first pattern layer is arranged on the third pattern layer, and the second pattern layer is arranged on the first pattern layer, the first pattern layer comprises at least one auxiliary metal line, the second pattern layer comprises at least one power line, and the third pattern layer comprises multiple rows and columns of second electrodes arranged in an array.
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公开(公告)号:US20190369452A1
公开(公告)日:2019-12-05
申请号:US16477915
申请日:2018-07-25
Applicant: BOE Technology Group Co., Ltd.
Inventor: Chunping LONG , Jian XU
IPC: G02F1/1362 , H01L27/12 , G02F1/1368
Abstract: An array substrate, a display panel and a display apparatus, used to improve crosstalk and afterimage, and increase display quality. The array substrate comprises a base substrate, several gate lines located on the base substrate, and several first common electrode lines, several second common electrode lines and several third common electrode lines located on the base substrate. The first common electrode lines are arranged in a parallel manner with respect to the gate lines, each first common electrode line being located in an area between two adjacent gate lines. The second common electrode lines are arranged in an insulated and intersecting manner with respect to the first common electrode lines, and the second common electrode lines are electrically connected to one portion of the first common electrode lines. The third common electrode lines are arranged in an insulated and intersecting manner with respect to the first common electrode lines.
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70.
公开(公告)号:US20180337262A9
公开(公告)日:2018-11-22
申请号:US15116980
申请日:2015-10-16
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xiaolong LI , Zheng LIU , Xiaoyong LU , Dong LI , Chunping LONG
CPC classification number: H01L29/66757 , H01L21/2026 , H01L21/265 , H01L21/28 , H01L27/1281 , H01L27/1296 , H01L29/06 , H01L29/78696
Abstract: A manufacturing method for a polysilicon thin film is provided. The manufacturing method for a polysilicon thin film includes forming a polysilicon layer, treating a surface of the polysilicon layer so that the surface of the polysilicon layer is electronegative, and supplying polar gas into a process chamber so that polar molecules of the polar gas are adsorbed on the surface of the polysilicon layer which is electronegative so as to form the polysilicon thin film, a surface of which has a hole density higher than an electron density.
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