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公开(公告)号：US20250087153A1
公开(公告)日：2025-03-13
申请号：US18560109
申请日：2022-12-26
Inventor： Tiaomei ZHANG , Ziyang YU , Yunsheng XIAO , Zhiliang JIANG , Ming HU
IPC: G09G3/3233 , G09G3/3266 , H10K59/131
Abstract: Disclosed are a pixel circuit, a driving method thereof, a display panel and a display apparatus, relating to the technical field of display. The pixel circuit comprises a drive transistor, a data writing module, a compensation adjustment module and a first reset module. A gate, a first electrode and a second electrode of the drive transistor are respectively connected with a first node, a second node and a third node; the data writing module is connected with a first scanning control signal terminal, a data signal terminal and the second node; the compensation adjustment module is connected with a second scan control signal terminal, the first node and the third node; the first reset module is connected with a first reset control signal terminal, the first node and a first initialization signal terminal.
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公开(公告)号：US20250078740A1
公开(公告)日：2025-03-06
申请号：US18294003
申请日：2023-05-23
Inventor： Ziyang YU , Haijun QIU , Ming HU , Zhiliang JIANG , Tianyi CHENG , Jianpeng WU , Mengqi WANG , Qi WEI , Wenbo CHEN , Tiaomei ZHANG , Sifei AI , Cong LIU , Qian XU
IPC: G09G3/3225
Abstract: The present disclosure provides a driving circuitry, a driving method, a driving module, and a display device. The driving circuitry includes a driving signal generation circuitry, a gating circuitry, an output control circuitry and an output circuitry. The driving signal generation circuitry is configured to perform a shifting operation on an (N−1)th-level driving signal to obtain an Nth-level driving signal. The gating circuitry is configured to write a gating input signal into a first node under the control of a gating control signal. The output control circuitry is configured to perform an NAND operation on the Nth-level driving signal and a potential at a second end of the output control circuitry to obtain a first output signal. The output circuitry is configured to perform phase inversion on the first output signal to obtain and provide an output driving signal through an output driving end, where N is a positive integer.
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公开(公告)号：US20250037652A1
公开(公告)日：2025-01-30
申请号：US18274477
申请日：2022-07-27
Inventor： Ming HU , Huijuan YANG , Tingliang LIU , Yi ZHANG , Kai ZHANG , Haijun QIU , Youngyik KO , Tinghua SHANG , Biao LIU
IPC: G09G3/3233 , H10K59/121 , H10K59/131
Abstract: A display substrate, a working method thereof, and a display device. The display substrate includes K pixel rows and K is a positive integer greater than 1; at least one pixel row includes an initial signal line, a scan signal line, and a plurality of sub-pixels disposed sequentially along an extension direction of the initial signal line and the scan signal line; the initial signal line includes a third initial signal line, the scan signal line includes a second scan signal line, at least one sub-pixel includes a pixel drive circuit, the pixel drive circuit at least includes a third transistor as a drive transistor and an eighth transistor as an initialization transistor; in at least a pixel row, the eighth transistor is connected with the third initial signal line, the second scan signal line, and a second electrode of the drive transistor.
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公开(公告)号：US20250031526A1
公开(公告)日：2025-01-23
申请号：US18709692
申请日：2023-04-25
Applicant: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD. , BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
Inventor： Wei ZHANG , Ming HU , Haijun QIU , Xiangdan DONG , Yi ZHANG , Zhiliang JIANG , Rui WANG , Taofeng XIE , Hai ZHENG , Fengli JI , Haigang QING , Gukhwan SONG , Tingliang LIU , Yu WANG , Cong FAN
IPC: H10K59/122
Abstract: A display substrate and a display apparatus are provided. The display substrate includes sub-pixels, a pixel defining pattern, and a defining structure. The sub-pixel includes a light-emitting functional layer. The pixel defining pattern includes first openings and second openings, a portion in the defining structure exposed by the second opening is configured to isolate the light-emitting functional layer. The sub-pixels include a first sub-pixel and a second sub-pixel, a turn-on voltage of the first sub-pixel is higher than that of the second sub-pixel; the defining structure includes a first defining structure surrounding the second sub-pixel and a second defining structure surrounding the second sub-pixel; the first defining structure is not exposed by the second opening; or a proportion of the first defining structure exposed by the second opening is less than a proportion of the second defining structure exposed by the second opening.
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公开(公告)号：US20250029557A1
公开(公告)日：2025-01-23
申请号：US18031347
申请日：2022-06-02
Inventor： Yujing LI , Ming HU , Xiangdan DONG , Cong FAN , Rong WANG , Zhenhua ZHANG , Kemeng TONG
IPC: G09G3/3233 , G09G3/32 , G09G3/3266
Abstract: Disclosed are a display substrate and a display apparatus, the display substrate includes a display region and a non-display region, the display substrate includes a base substrate and a circuit structure layer disposed on the base substrate, the circuit structure layer includes multiple pixel circuits arranged in an array and located in the display region and multiple drive circuits located in the non-display region. At least one pixel circuit includes multiple transistors and the multiple drive circuits are configured to provide drive signals to the multiple transistors; the circuit structure layer further includes: a high-level power supply line and a low-level power supply line located in the non-display region, at least one drive circuit is electrically connected with the high-level power supply line and the low-level power supply line respectively, and the high-level power supply line and the low-level power supply line extend along a first direction; and high-level power supply lines connected with at least two drive circuits are a same power supply line and/or low-level power supply lines connected with at least two drive circuits are a same power supply line.
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Patent Agency Ranking
公开(公告)号：US20250006284A1
公开(公告)日：2025-01-02
申请号：US18705560
申请日：2023-04-21
IPC: G11C19/28 , G09G3/3266
Abstract: Disclosed is a shift register, including an input module providing an input signal at an input signal end for a second node, a first output module, a second output module, a first control module, a second control module, a third control module, a fourth control module, and an energy storage module, wherein controlled by a voltage at the second node, the first output module providing a first power supply signal at a first power supply signal end for an output signal end, and, controlled by a voltage at a first node, the second output module providing a second power supply signal at a second power supply signal end for the output signal end. The first control module, the second control module, the third control module, the fourth control module and the energy storage module control potentials at the first node, a third node and a fourth node in cooperation.
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公开(公告)号：US20240423055A1
公开(公告)日：2024-12-19
申请号：US18701591
申请日：2023-06-20
Inventor： Ziyang YU , Zhiliang JIANG , Ming HU
IPC: H10K59/35 , H10K59/122 , H10K59/131
Abstract: A display panel is provided. The display panel includes a first display region. The first display region includes a plurality of sub-pixels. The plurality of sub-pixels are in one-to-one correspondence with a plurality of aperture regions, and light-emitting regions of the sub-pixel are randomly distributed within corresponding aperture regions.
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公开(公告)号：US20240423051A1
公开(公告)日：2024-12-19
申请号：US18702338
申请日：2023-07-31
Inventor： Tiaomei ZHANG , Wenbo CHEN , Bangqing XIAO , Yujing LI , Zhiliang JIANG , Ming HU
IPC: H10K59/131 , H10K59/12 , H10K59/121 , H10K59/88
Abstract: A display substrate and manufacturing method therefor, and a display apparatus. The display substrate comprises driving structure layer comprising multiple light-emitting units and light-emitting structure layer comprising multiple unit rows and at least two dummy rows. A unit row comprises multiple circuit units arranged in a first direction, a dummy row comprises multiple dummy unit arranged in first direction, multiple unit rows and at least two dummy rows are sequentially arranged in a second direction intersecting first direction; at least one dummy row is provided with first connecting line extending in first direction and connected to first initial signal line extending in second direction to form a mesh structure for transmitting first initial signal; and/or at least another dummy row is provided with second connecting line extending in first direction and connected to a second initial signal line extending in second direction to form a mesh structure for transmitting second initial signal.
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公开(公告)号：US20240423037A1
公开(公告)日：2024-12-19
申请号：US18398064
申请日：2023-12-27
Inventor： Tiaomei ZHANG , Juntao CHEN , Ziyang YU , Zhiliang JIANG , Ming HU
IPC: H10K59/131 , H01L27/12 , H10K59/121
Abstract: A display panel includes a pixel drive circuit for driving a light emitting unit. The pixel drive circuit is connected to the first electrode of the light emitting unit, and the display panel further includes: a base substrate, a first power line, a second power line, and a common electrode layer. The first power line and the second power line are located a the display area of the display panel, the orthographic projection of the first power line on the base substrate is extended along the first direction, the orthographic projection of the second power line on the base substrate is extended along the second direction, and the second direction is intersected with the first direction, at least a part of the second power line is connected to at least a part of the first power line through a via hole.
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公开(公告)号：US20240257733A1
公开(公告)日：2024-08-01
申请号：US18014766
申请日：2021-07-30
Inventor： Yao HUANG , Benlian WANG , Ming HU , Lang LIU , Kai ZHANG , Weiyun HUANG
IPC: G09G3/3233 , H10K59/121
CPC classification number: G09G3/3233 , H10K59/1213 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2310/08 , G09G2320/0247 , G09G2320/0257 , G09G2330/021
Abstract: A pixel driving circuit includes: a driving transistor, a data write circuit, a threshold compensation circuit, a first capacitor, and a second capacitor. A gate of the driving transistor is coupled to a first node, a first electrode is coupled to a second node, and a second electrode is coupled to a third node. The data write circuit is configured to transmit a signal of a data signal terminal to the second node in response to a signal of a first gate driving signal terminal. The threshold compensation circuit is configured to communicate the first node with the third node in response to a signal of a second gate driving signal terminal. The first capacitor is coupled between the first node and the first gate driving signal terminal. The second capacitor is coupled between the first node and the second gate driving signal terminal.
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