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公开(公告)号：US20230084070A1
公开(公告)日：2023-03-16
申请号：US17770250
申请日：2021-04-15
Inventor： Xuehuan FENG , Yongqian LI
Abstract: The present disclosure provides a shift register unit, a signal generation unit circuit, a driving method and a display device. The shift register unit includes a first node control circuit, a second node control circuit and an output circuit, the first node control circuit is used to control a potential of a first node; the second node control circuit controls a potential of a second node; the output circuit is used to control and maintain the potential of the first node and the potential of the second node, and control to connect the output terminal and the second clock signal terminal under the control of the potential of the first node, and control to connect the input terminal and the second voltage terminal under the control of the potential of the second node.
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公开(公告)号：US20230033702A1
公开(公告)日：2023-02-02
申请号：US17791558
申请日：2020-12-23
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266
Abstract: A display panel (100), comprising: a substrate (1), a plurality of sub-pixels (2) and a gate driving circuit (3). The sub-pixels (2) comprise pixel driving circuits (21). The gate driving circuit (3) comprises multiple stages of cascaded shift registers (31), wherein one stage of shift registers (31) is electrically connected to a plurality of pixel driving circuits (21) in one row of sub-pixels (2). The gate driving circuit (3) further comprises: a plurality of cascaded input signal lines (34) and a plurality of cascaded display reset signal lines (35). Each cascaded input signal line (34) is configured to be connected to a shift signal end (CR ) of one stage of shift registers (31) and an input signal end (Iput) of another stage of shift registers (31); and each cascaded display reset signal line (35) is configured to be connected to the shift signal end (CR ) of one stage of shift registers (31) and a display reset signal end (STD) of another stage of shift registers. The display panel (100) is provided with a plurality of sub-pixel regions (S) used for arranging the plurality of sub-pixels (2), and first gap regions (D) located between two adjacent columns of sub-pixel regions (5); and the cascaded display reset signal lines (35) and the cascaded input signal lines (34) are both arranged in the first gap regions (D), and the two are arranged in different first gap regions (D).
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公开(公告)号：US20230021680A1
公开(公告)日：2023-01-26
申请号：US17787943
申请日：2021-08-05
Inventor： Yongqian LI , Can YUAN
Abstract: A display substrate, including: a base, and a plurality of sub-pixels arranged on the base. At least one of the plurality of sub-pixels includes a pixel driving circuit and a light-emitting element electrically connected to the pixel driving circuit. The pixel driving circuit includes a plurality of transistors and at least one storage capacitor. In a direction perpendicular to the base, the display substrate includes: a semiconductor layer, a first metal layer, a second metal layer, a third metal layer and a fourth metal layer, which are sequentially arranged on the base. The semiconductor layer includes: an active layer of the plurality of transistors. The first metal layer includes at least a scanning line extending in a first direction, a gate electrode of the plurality of transistors, and a first capacitor electrode plate of the storage capacitor.
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公开(公告)号：US20220262886A1
公开(公告)日：2022-08-18
申请号：US17614301
申请日：2020-11-06
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN , Meng LI , Xuelian CHENG
IPC: H01L27/32
Abstract: Provided are a display substrate and a preparation method therefor, and a display apparatus, which can not only avoid jumpers generated when a light-emitting device in a sub-pixel is electrically connected to a storage capacitor, in order to avoid the risk of crosstalk, but can also increase the pixel aperture ratio of the display substrate and increase the capacitance of the storage capacitor in a pixel driving circuit. The display substrate comprises: a base, and a pixel driving circuit and a bottom-emission-type light-emitting device which are arranged in a display region on the base and are located in each sub-pixel, wherein the light-emitting device comprises a first electrode connected to the pixel driving circuit; the pixel driving circuit comprises a first storage capacitor; the first storage capacitor comprises a first storage electrode and a second storage electrode which are arranged opposite each other; the first electrode is multiplexed as the first storage electrode; and the second storage electrode and the first electrode are both transparent electrodes.
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公开(公告)号：US20220208948A1
公开(公告)日：2022-06-30
申请号：US17610409
申请日：2020-11-17
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Pan XU , Yongqian LI , Dacheng ZHANG , Lang LIU
Abstract: A display substrate has a display area including a plurality of sub-display areas. The display substrate includes a base, a plurality of columns of pixels, a plurality of first and second power lines disposed on the base. At least two columns of pixels are disposed in each sub-display area, and each column of pixels includes at least three columns of sub-pixels. At least one first power line is disposed in each sub-display area and configured to provide a first power signal to all sub-pixels in a sub-display area. The second power lines are configured to provide second power signals to all sub-pixels. A plurality of columns of sub-pixels are disposed between any two adjacent power lines, to and any first and second power lines are each arranged between two adjacent columns of sub-pixels emitting light of a first color and sub-pixels emitting light of a second color.
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Patent Agency Ranking
公开(公告)号：US20220165829A1
公开(公告)日：2022-05-26
申请号：US17433435
申请日：2020-11-13
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN
Abstract: A display substrate comprises a pixel driving circuit and a bottom-emission light-emitting device that are disposed on a base and located in each sub-pixel in a display area. The light-emitting device includes a first electrode electrically connected to the pixel driving circuit. The pixel driving circuit includes a first storage capacitor and a second storage capacitor connected in parallel. The first storage capacitor includes a first storage electrode and a second storage electrode that are disposed oppositely, and the first electrode serves as the first storage electrode. The second storage capacitor includes the second storage electrode and a third storage electrode that are disposed oppositely. The second storage electrode is located between the first storage electrode and the third storage electrode. The first storage electrode is electrically connected to the third storage electrode. The first electrode, the second storage electrode, and the third storage electrode are all transparent electrodes.
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公开(公告)号：US20220123073A1
公开(公告)日：2022-04-21
申请号：US17270414
申请日：2020-05-15
Inventor： Meng LI , Yongqian LI , Chen XU , Dacheng ZHANG , Jingquan WANG , Zhidong YUAN , Haixia XU
Abstract: Provided are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a plurality of display units; the display unit includes a driving structure layer, a light emitting structure layer and a color filter layer which are located in the display area and sequentially arranged on the substrate; the light emitting structure layer comprises a plurality of light emitting structures each including a pixel define layer and an organic light emitting layer; the organic light emitting layer is located in an opening area of the pixel define layer and on the pixel define layer; the color filter layer includes a plurality of light filters; the display substrate includes a spacing area located in the display area, the spacing area being located between opening areas of pixel define layers of adjacent light emitting structures.
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公开(公告)号：US20220114970A1
公开(公告)日：2022-04-14
申请号：US17417675
申请日：2020-10-15
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266
Abstract: Provided are a shift register unit circuit and drive method, and a gate driver and a display device. The shift register unit circuit includes a first sub-unit circuit, a second sub-unit circuit, a third sub-unit circuit, and a fourth sub-unit circuit. Responsive to providing a corresponding input pulse and clock signal, the shift register unit circuit is configured output first, second, third, and fourth output signals. The shift register unit circuit is configured such that a fifth node is in conduction with a second node at least while the reset pulse is active.
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公开(公告)号：US20220114938A1
公开(公告)日：2022-04-14
申请号：US17555695
申请日：2021-12-20
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/20
Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes an input circuit, a first control circuit, a blanking control circuit, a first output circuit, and a second output circuit. The input circuit is configured to control a level of a first node in response to an input signal input; the first control circuit is configured to control a level of the second node; the blanking control circuit is configured to control the level of the first node and the level of the second node; the first output circuit is configured to output a first output signal at the first output terminal under control of the level of the first node; and the second output circuit is configured to output a second output signal at the second output terminal under control of the level of the second node.
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公开(公告)号：US20220068190A1
公开(公告)日：2022-03-03
申请号：US17417282
申请日：2020-11-04
Inventor： Xuehuan FENG , Yongqian LI
Abstract: The present disclosure relates to a gate drive circuit. The gate drive circuit includes: cascaded GOA units, first clock signal lines, second clock signal lines, connecting lines and electrostatic protection sub-circuits. The first clock signal lines are used to provide various clock signals to the GOA units. The second clock signal lines are used to, when any of the clock signal lines is broken, replace the broken clock signal line to transmit a corresponding clock signal. The electrostatic protection sub-circuits are electrically connected to corresponding first clock signal lines or corresponding second clock signal lines through the connecting lines. Orthographic projections of the connecting lines on a plane where corresponding first clock signal lines or corresponding second clock signal lines are located intersect with the corresponding first clock signal lines and the corresponding second clock signal lines, respectively.
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