公开(公告)号：US09811389B2

公开(公告)日：2017-11-07

申请号：US14862510

申请日：2015-09-23

Applicant: Intel Corporation

Inventor： Tomer Rider ,  Lev Faivishevsky ,  Igor Ljubunicic ,  Shahar Taite ,  Raphael Sack

IPC: G06F9/46 ,  G06F9/50 ,  G06F9/48 ,  G06F1/32

CPC classification number: G06F9/5094 ,  G06F1/329 ,  G06F9/4893 ,  Y02D10/22 ,  Y02D10/24

Abstract: A method and apparatus for assigning tasks to processor cores, based on usage history, to have tasks executed at the highest frequency with the lowest power consumption are described. In one embodiment, the apparatus comprises processor cores, an interconnect coupled to the processor cores, at least one memory module coupled to the interconnect, and a task assigning module to assign a first task, based the usage history, to one processor core for execution at maximum frequency with minimum power usage in comparison to other processor cores of the plurality, the usage history being based on monitored core temperature, frequency and power usage for a first set of tasks previously executed by the plurality of processor cores.