EFFICIENT INTEGRITY MONITORING OF PROCESSING OPERATIONS WITH MULTIPLE MEMORY ARRAYS

    公开(公告)号:US20230161877A1

    公开(公告)日:2023-05-25

    申请号:US17992221

    申请日:2022-11-22

    CPC classification number: G06F21/554 G06F2221/034

    Abstract: Disclosed systems and techniques are directed to efficient integrity monitoring of computational operations using multiple memory arrays collectively representative of known events associated with the computational operations. Disclosed techniques include obtaining event identification value representative of a state of the computing device associated with execution of an operation on the computing device, obtaining memory pointers and selecting, based on the memory pointers, mapping values from multiple memory arrays, computing an event response value, and classifying the operation among a plurality of classes, based on the event response value.

    SIGN-EFFICIENT ADDITION AND SUBTRACTION FOR STREAMINGCOMPUTATIONS IN CRYPTOGRAPHIC ENGINES

    公开(公告)号:US20230042366A1

    公开(公告)日:2023-02-09

    申请号:US17865036

    申请日:2022-07-14

    Abstract: Aspects of the present disclosure involve techniques and cryptographic processors configured to perform the techniques that include sign-efficient addition and subtraction operations that use Montgomery reduction and are capable of facilitating fast streaming operations. The techniques involve receiving a first number and a second number, where the first number and second number are within a target interval, and performing a modular operation to obtain a third number, the third number being within the same target interval and representing a sum or a difference of a rescaled first number and a rescaled second number, and wherein the modular operation includes a Montgomery reduction.

    Determining cryptographic operation masks for improving resistance to external monitoring attacks

    公开(公告)号:US11507705B2

    公开(公告)日:2022-11-22

    申请号:US16896737

    申请日:2020-06-09

    Abstract: Systems and methods for determining cryptographic operation masks for improving resistance to external monitoring attacks. An example method may comprise: selecting a first input mask value, a first output mask value, and one or more intermediate mask values; based on the first output mask value and the intermediate mask values, calculating a first transformation output mask value comprising two or more portions, wherein concatenation of all portions of the first transformation output mask value produces the first transformation output mask value, and wherein exclusive disjunction of all portions of the first transformation output mask value is equal to the first output mask value; and performing a first masked transformation based on the first transformation output mask value and the first input mask value.

    SYSTEM AND METHOD TO OPTIMIZE GENERATION OF COPRIME NUMBERS IN CRYPTOGRAPHIC APPLICATIONS

    公开(公告)号:US20220166614A1

    公开(公告)日:2022-05-26

    申请号:US17532460

    申请日:2021-11-22

    Abstract: Aspects of the present disclosure involve a method, a system and a computer readable memory to perform a cryptographic operation that includes identifying a first set of mutually coprime numbers, obtaining a second set of input numbers coprime with a corresponding one of the first set of mutually coprime numbers, obtaining an output number that is a weighted sum of the second set of input numbers, each of the second set of input numbers being taken with a weight comprising a product of all of the first set of mutually coprime numbers except the corresponding one of the first set of mutually coprime numbers, and performing the cryptographic operation using the output number.

    Integrated circuit shield
    75.
    发明授权

    公开(公告)号:US11329010B2

    公开(公告)日:2022-05-10

    申请号:US16838577

    申请日:2020-04-02

    Abstract: An anti-tamper layer is applied to a blank wafer. The layered wafer is then diced into shield dies. A shield die is oxide-to-oxide bonded to the top of an active die such that removing the shield die will damage the active die. The shield die may be sized and positioned such that wirebond pads along one or more edges of the active die remain exposed. The exposed wirebond pads may be used to electrically connect, via wirebonds, the active die to a substrate. A second shield die may be attached to the bottom of the active die to help protect against the use of bottom-to-top delayering.

    EXPONENT SPLITTING FOR CRYPTOGRAPHIC OPERATIONS

    公开(公告)号:US20210391975A1

    公开(公告)日:2021-12-16

    申请号:US17339689

    申请日:2021-06-04

    Inventor: Michael Tunstall

    Abstract: A first share value and a second share value may be received. A combination of the first share value and the second share value may correspond to an exponent value. The value of a first register is updated using a first equation that is based on the first and second share values and the value of a second register is updated using a second equation that is based on the second share value. One of the value of the first register or the value of the second register is selected based on a bit value of the second share value.

    ALL-DIGITAL CAMOUFLAGE CIRCUIT
    79.
    发明申请

    公开(公告)号:US20210342509A1

    公开(公告)日:2021-11-04

    申请号:US17269219

    申请日:2019-08-15

    Inventor: Scott C. Best

    Abstract: Described are technologies of all-digital camouflage circuits. The camouflage circuit can include a first chain of inverters, synthesized with a first standard cell with a first transistor threshold, and a second chain of inverters, synthesized with a second standard cell with a second transistor threshold that is different than the first transistor threshold. A first flip-flop receives a first output of the first chain as a data input and a second output of the second chain as a clock input. A second flip-flop receives the second output as a data input and the first output of the first chain as a clock input. Given the different transistor thresholds, one flip-flop always outputs an active signal that corresponds to an input signal applied to the first chain and the second chain. The other flip-flop always output a constant signal, such an always low signal.

    Diversifying a base symmetric key based on a public key

    公开(公告)号:US11042488B2

    公开(公告)日:2021-06-22

    申请号:US15166700

    申请日:2016-05-27

    Inventor: Ambuj Kumar

    Abstract: A symmetric key that is stored at a device may be received. A public key from a remote entity may also be received at the device. Furthermore, a derived key may be generated based on a one way function between the symmetric key that is stored at the device and the public key that is received from the remote entity. The derived key may be encrypted with the public key and transmitted to the remote entity. The encryption of the derived key with the public key may provide secure transmission of the derived key to an authorized remote entity with a private key that may be used to decrypt the encrypted derived key.

Patent Agency Ranking