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公开(公告)号：US06618485B1
公开(公告)日：2003-09-09
申请号：US09100033
申请日：1998-06-19
申请人： Naoshi Matsuo
发明人： Naoshi Matsuo
IPC分类号： H04R300
CPC分类号： H04R3/005
摘要： The present invention provides a microphone array including a small number of real microphone that can realize the same characteristics as a microphone array including a large number of real microphones. The microphone array of the present invention includes a plurality of real microphones, at least one virtual microphone, and an estimator for estimating a sound signal to be received by the virtual microphone based on the sound signals received by the real microphones.
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72.发明授权Multimedia server having a plurality of stream controllers directly connected to the network 失效具有直接连接到网络的多个流控制器的多媒体服务器
公开(公告)号：US5717854A
公开(公告)日：1998-02-10
申请号：US563544
申请日：1995-11-28
CPC分类号： H04L49/105 , H04L49/3081 , H04N7/147 , H04N7/17336 , H04Q11/0478 , H04L2012/5638
摘要： Each of processor units 31-1-31-n comprises a CPU, memory, and interface function. A high-speed communications network 32 interconnects the processor units for inter-processor communications. Each of input/output units 33-1-33-n stores multimedia data and transmits the multimedia data through the network under the control of the corresponding processor unit. A processor control unit 34 controls the process of each of the processor units 31-1-31-n according to the process request received through the network. A switch 35 connects each of the input/output units 33-1-33-n to the network and exchanges data through the network. A communications line 36 transfers an instruction, etc. from the processor control unit 34 to each of the processor units 31-1-31-n.
摘要翻译： 每个处理器单元31-1-31-n包括CPU，存储器和接口功能。 高速通信网络32将用于处理器间通信的处理器单元互连。 输入/输出单元33-1-33-n中的每一个存储多媒体数据，并在对应的处理器单元的控制下通过网络发送多媒体数据。 处理器控制单元34根据通过网络接收的处理请求来控制每个处理器单元31-1-31-n的处理。 开关35将输入/输出单元33-1-33-n中的每一个连接到网络并通过网络交换数据。 通信线路36将处理器控制单元34的指令等传送到每个处理器单元31-1-31-n。
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