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公开(公告)号:US11114005B2
公开(公告)日:2021-09-07
申请号:US16623989
申请日:2019-07-23
IPC分类号: G09G3/20
摘要: A pixel structure is disclosed. The pixel structure includes: a plurality of scanning lines; a plurality of data lines intersecting the plurality of scanning lines; and a plurality of sub-pixels which are located at respective intersections of the plurality of scanning lines and the plurality of data lines and are arranged in rows and columns. (4n+1)th and (4n+2)th data lines of the plurality of data lines are located on opposite sides of a (2n+1)th column of sub-pixels respectively. (4n+3)th and (4n+4)th data lines of the plurality of data lines are located on opposite sides of a (2n+2)th column of sub-pixels respectively. The (4n+2)th and (4n+3)th data lines of the plurality of data lines are located between the (2n+1)th column of sub-pixels and the (2n+2)th column of sub-pixels, where n is an integer greater than or equal to 0.
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72.
公开(公告)号:US10991789B2
公开(公告)日:2021-04-27
申请号:US16558849
申请日:2019-09-03
发明人: Yipeng Chen , Li Wang
摘要: A display substrate, a method of driving the same, a method of manufacturing the same and a display device are provided. The display substrate includes a plurality of non-foldable display regions and a plurality of foldable display regions. The display substrate further includes a first signal line connected to a first electrode and a second signal line connected to a second electrode. The first signal line includes a plurality of secondary signal lines independent of each other. Each secondary signal line corresponds to one of the non-foldable display regions and is configured to control whether to supply power to the corresponding non-foldable display region.
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73.
公开(公告)号:US20190164497A1
公开(公告)日:2019-05-30
申请号:US15980985
申请日:2018-05-16
发明人: Li Wang
IPC分类号: G09G3/3266 , G11C19/28
摘要: Embodiments of the application provide a shift register comprising a shift signal generating circuit and at least two time-sharing controlling circuits. The shift signal generating circuit may be configured to generate a shift signal. Each of the time-sharing controlling circuits comprises a first driving sub-circuit and a second driving sub-circuit, wherein the first driving sub-circuit is configured to enable the time-sharing controlling circuit to output the shift signal during the preset period, and the second driving sub-circuit is configured to enable the time-sharing controlling circuit to output an invalid signal during the non-preset period. During a driving cycle, the first driving sub-circuits in each of the at least two time-sharing controlling circuits are turned on sequentially, so that each of the at least two time-dividing controlling circuits outputs the shift signal sequentially.
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公开(公告)号:US11997892B2
公开(公告)日:2024-05-28
申请号:US17279689
申请日:2020-06-18
发明人: Li Wang , Bo Wang , Jingquan Wang
IPC分类号: H10K59/131 , G09G3/00 , G09G3/3225 , H10K59/121 , H10K59/35
CPC分类号: H10K59/131 , G09G3/00 , G09G3/3225 , H10K59/1213 , H10K59/1216 , H10K59/353 , G09G2300/00
摘要: Provided are a display panel and a manufacturing method thereof, and a display device. The display panel includes: a base substrate including a display area and a peripheral area; a plurality of sub-pixels, each sub-pixel including a light-emitting element and a pixel driving circuit; a plurality of gate lines and light-emitting control lines; a gate driving circuit located at the display area and including cascaded multistage gate driving units, one or more stages include gate driving sub-circuits including a first and a second gate driving sub-circuit spaced apart by pixel driving circuits of a first group of sub-pixels; and a light-emitting control driving circuit located at the display area and including cascaded multistage light-emitting control driving units, one or more stages include light-emitting control driving sub-circuits including a first and a second light-emitting control driving sub-circuit spaced apart by pixel driving circuits of a second group of sub-pixels.
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公开(公告)号:US11805682B2
公开(公告)日:2023-10-31
申请号:US17366704
申请日:2021-07-02
发明人: Yipeng Chen , Li Wang , Lujiang Huangfu
IPC分类号: H01L29/08 , H10K59/121 , G09G3/3291 , H10K59/126
CPC分类号: H10K59/1216 , G09G3/3291 , H10K59/126 , H10K59/1213
摘要: An organic light emitting diode display substrate, comprises: a base substrate, and a first data line, a driving thin film transistor and an energy storage capacitor, wherein the energy storage capacitor comprises a first capacitor plate and a second capacitor plate disposed opposite to each other, and the second capacitor plate is electrically connected to a gate of the driving thin film transistor, in a direction away from the base substrate, the first capacitor plate is disposed between the first data line and the second capacitor plate. The display substrate further comprises a power line and a voltage equalizing line which are electrically connected, the power line extends in a first direction which is substantially parallel to a direction in which the first data line extends, and the voltage equalizing line extends in a second direction. A method of manufacturing the display substrate and a display device are also provided.
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公开(公告)号:US11774654B2
公开(公告)日:2023-10-03
申请号:US16757532
申请日:2018-10-29
发明人: Xiongwei Wang , Baojie Zhao , Jian Li , Li Wang , Xiang Hui , Yan Zhao , Qinglin Ma , Chunhong Ma
IPC分类号: G02B5/28 , B32B37/26 , B32B43/00 , G02F1/1335
CPC分类号: G02B5/28 , B32B37/26 , B32B43/006 , B32B2037/268 , B32B2307/402 , G02F1/133516
摘要: A substrate, a mask, a display panel and a display device are provided. The substrate includes a base substrate and a color resistance layer on the base substrate. The substrate has a display area and a non-display area. The color resistance layer in the non-display area includes a weakening unit for weakening or disconnecting connection between the color resistance layer in the non-display area away from the display area and the color resistance layer in the display area. During the development and washing process of the substrate, even if the color resistance layer in the non-display area is peeled off, the color resistance layer in the display area will not be peeled off together, which helps to ensure the safety and reliability of the color resistance layer in the display area.
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公开(公告)号:US11569334B2
公开(公告)日:2023-01-31
申请号:US17038305
申请日:2020-09-30
摘要: The present disclosure provides a display substrate and a display device. The display substrate includes a first reference voltage line, a second reference voltage line and a first reference voltage auxiliary line, the first reference voltage line, the second reference voltage line and the first reference voltage auxiliary line are respectively disposed in one of a second wiring layer, a third wiring layer and a fourth wiring layer, the first reference voltage line is electrically coupled to the first reference voltage auxiliary line through via holes penetrating an insulating layer therebetween, the first reference voltage line and the first reference voltage auxiliary line extend in different directions, the second reference voltage line and the first reference voltage auxiliary line extend in a same direction, the first reference voltage line extends in a row or column direction, and the second reference voltage line extends in the row or column direction.
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公开(公告)号:US11430855B2
公开(公告)日:2022-08-30
申请号:US17003872
申请日:2020-08-26
发明人: Li Wang
摘要: The present disclosure provides a display panel and a method for manufacturing the display panel. The display panel includes: a base substrate; a conductive layer on the base substrate including a level signal wiring pattern; a cathode layer on a side of the conductive layer away from the base substrate; an anode layer on the side of the conductive layer away from the base substrate and on a side of the cathode layer facing the base substrate; a thin film transistor on a side of the anode layer facing the base substrate and on the side of the conductive layer away from the base substrate, including a source electrode, a drain electrode, an active layer, and a gate electrode, wherein the level signal wiring pattern is electrically connected to the cathode layer.
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公开(公告)号:US20220199737A1
公开(公告)日:2022-06-23
申请号:US17279689
申请日:2020-06-18
发明人: Li Wang , Bo Wang , Jingquan Wang
IPC分类号: H01L27/32 , G09G3/3225
摘要: Provided are a display panel and a manufacturing method thereof, and a display device. The display panel includes: a base substrate including a display area and a peripheral area; a plurality of sub-pixels, each sub-pixel including a light-emitting element and a pixel driving circuit; a plurality of gate lines and light-emitting control lines; a gate driving circuit located at the display area and including cascaded multistage gate driving units, one or more stages include gate driving sub-circuits including a first and a second gate driving sub-circuit spaced apart by pixel driving circuits of a first group of sub-pixels; and a light-emitting control driving circuit located at the display area and including cascaded multistage light-emitting control driving units, one or more stages include light-emitting control driving sub-circuits including a first and a second light-emitting control driving sub-circuit spaced apart by pixel driving circuits of a second group of sub-pixels.
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公开(公告)号:US20220199736A1
公开(公告)日:2022-06-23
申请号:US17279636
申请日:2020-06-18
发明人: Li Wang , Bo Wang , Jingquan Wang
IPC分类号: H01L27/32 , H01L51/56 , H01L51/52 , G09G3/3266
摘要: Provided are a display panel and a manufacturing method thereof, and a display device. The display panel includes: a base substrate including a display area and a peripheral area including a first peripheral area, and an edge of the first peripheral area is of a first curvature greater than zero; a plurality of sub-pixels, data lines and gate lines; a gate driving circuit located at the display area and including multistage gate driving units, one or more stages include a first and a second gate driving sub circuit; a plurality of control signal lines, at least a part of at least one control signal line is of a second curvature greater than zero; a plurality of data signal input lines; and a multiplexing circuit including a plurality of multiplexing units, each of which is connected to the control signal lines, one data signal input line, and at least two data lines.
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