公开(公告)号：US07053431B2

公开(公告)日：2006-05-30

申请号：US10777756

申请日：2004-02-13

申请人： Ryu Ogiwara

发明人： Ryu Ogiwara

IPC分类号： H01L29/76

CPC分类号： G11C13/0004 ,  G11C2213/79 ,  H01L27/2436 ,  H01L27/2445 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148

摘要： A phase-change memory device includes memory cells, a memory cell array, a first electrode layer, a word line, and a bit line. The memory cell includes a phase-change layer formed on a semiconductor substrate. The memory cell array has the memory cells arranged in a matrix. The phase change layer includes first regions which contact the semiconductor substrate in units of memory cells and a second region which connects the first regions arranged in a same column. The first electrode layer is formed on the second region. A contact area of each first region and the semiconductor substrate is smaller than a contact area of the second region and the first electrode layer. The bit line is electrically connected to the first electrode layer. The bit line is connects in common the phase-change layers of the memory cells arranged in the same column.

摘要翻译： 相变存储器件包括存储单元，存储单元阵列，第一电极层，字线和位线。 存储单元包括形成在半导体衬底上的相变层。 存储单元阵列具有排列成矩阵的存储单元。 相变层包括以存储单元为单位接触半导体衬底的第一区域和连接布置在同一列中的第一区域的第二区域。 第一电极层形成在第二区域上。 每个第一区域和半导体衬底的接触面积小于第二区域和第一电极层的接触面积。 位线与第一电极层电连接。 位线连接在同一列中布置的存储单元的相变层。