Multilevel interconnection structure for integrated circuits and method
of producing same
    81.
    发明授权
    Multilevel interconnection structure for integrated circuits and method of producing same 失效
    集成电路的多层互连结构及其制造方法

    公开(公告)号:US6051491A

    公开(公告)日:2000-04-18

    申请号:US938634

    申请日:1997-09-26

    申请人: Shinya Ito

    发明人: Shinya Ito

    摘要: In producing a multilevel interconnection structure, an insulator film is placed on and bonded to interconnecting lines laid on an insulating layer on a semiconductor substrate such that all the spacings between the interconnecting lines are left as vacant spaces. For example, the insulator film is a polyimide film or a silicon oxide film. The vacant spaces serve the purpose of reducing capacitance between adjacent interconnecting lines. After forming contact holes in the insulator film and filling the contact holes with a metal, upper-level interconnecting lines are laid on the insulator film.

    摘要翻译: 在制造多层互连结构时,将绝缘膜放置在半导体衬底上的布置在绝缘层上的互连线上并结合到互连线之间的所有间隔留作空格。 例如,绝缘膜是聚酰亚胺膜或氧化硅膜。 空闲空间用于减小相邻互连线之间的电容。 在绝缘膜形成接触孔并用金属填充接触孔之后,将上层互连线铺设在绝缘膜上。