公开(公告)号：US20240363400A1

公开(公告)日：2024-10-31

申请号：US18764971

申请日：2024-07-05

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Cheng-Chin LEE ,  Ting-Ya LO ,  Chi-Lin TENG ,  Cherng-Shiaw TSAI ,  Shao-Kuan LEE ,  Kuang-Wei YANG ,  Gary LIU ,  Hsin-Yen HUANG ,  Hsiao-Kang CHANG ,  Shau-Lin SHUE

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L21/7682 ,  H01L23/5329 ,  H01L23/5226 ,  H01L23/53295

摘要： A method for manufacturing a semiconductor device includes: forming a first feature and a second feature extending in a normal direction transverse to a substrate; directionally depositing a dielectric material upon the features at an inclined angle relative to the normal direction so as to form a cap layer including a top portion disposed on a top surface of each of the features, and two opposite wall portions extending downwardly from two opposite ends of the top portion to partially cover two opposite lateral surfaces of each of the features, respectively, the cap layer on the first feature being spaced apart from the cap layer on the second feature; forming a sacrificial feature in a recess between the features; forming a sustaining layer to cover the sacrificial feature; and removing the sacrificial feature to form an air gap.

公开(公告)号：US20240355671A1

公开(公告)日：2024-10-24

申请号：US18758180

申请日：2024-06-28

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： LIN-YU HUANG ,  LI-ZHEN YU ,  CHIA-HAO CHANG ,  CHENG-CHI CHUANG ,  CHIH-HAO WANG ,  KUAN-LUN CHENG

IPC分类号： H01L21/768 ,  H01L23/532

CPC分类号： H01L21/7682 ,  H01L23/5329 ,  H01L21/76807 ,  H01L23/53238

摘要： A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a device, a conductive structure disposed over the device, and the conductive structure includes a sidewall having a first portion and a second portion. The semiconductor device structure further includes a first spacer layer including a third portion and a fourth portion, the third portion surrounds the first portion of the sidewall, and the fourth portion is disposed on the conductive structure. The semiconductor device structure further includes a first dielectric material surrounding the third portion, and an air gap is formed between the first dielectric material and the third portion of the first spacer layer. The first dielectric material includes a first material different than a second material of the first spacer layer, and the first dielectric material is substantially coplanar with the fourth portion of the first spacer layer.

公开(公告)号：US12125790B2

公开(公告)日：2024-10-22

申请号：US17449381

申请日：2021-09-29

申请人： International Business Machines Corporation

发明人： Ashim Dutta ,  Ekmini Anuja De Silva ,  Praveen Joseph ,  Jennifer Church

IPC分类号： H01L23/532 ,  H01L21/768

CPC分类号： H01L23/53295 ,  H01L21/7682 ,  H01L21/76834 ,  H01L21/76837

摘要： Airgap isolation for back-end-of-the-line interconnect structures includes a dielectric liner formed above a top surface and opposite sidewalls of each of a plurality of metal lines on a substrate, the dielectric liner disposed above a top surface of the substrate not covered by the plurality of metal lines, portions of the dielectric liner located on the opposite sidewalls of each of the plurality of metal lines are separated by a space. A dielectric cap is disposed above an uppermost surface of portions of the dielectric liner above each of the plurality of metal lines and above the space, the dielectric cap pinches-off the space between portions of the dielectric liner located on the opposite sidewalls of each of the plurality of metal lines for providing airgaps between adjacent metal lines.

公开(公告)号：US12125744B2

公开(公告)日：2024-10-22

申请号：US17670751

申请日：2022-02-14

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Tzu-Ching Tsai

IPC分类号： H01L21/768 ,  H01L23/532 ,  H01L23/535 ,  H10B12/00

CPC分类号： H01L21/7682 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76841 ,  H01L21/76895 ,  H01L23/5329 ,  H01L23/535 ,  H10B12/00

摘要： The present disclosure provides a semiconductor device with a composite conductive feature and an air gap and a method for preparing the semiconductor device. The semiconductor device includes a first composite conductive feature and a second composite conductive feature disposed over a pattern-dense region of a semiconductor substrate. The semiconductor device also includes a third composite conductive feature and a fourth composite conductive feature disposed over a pattern-loose region of the semiconductor substrate. The semiconductor device further includes a dielectric layer disposed over the pattern-dense region and the pattern-loose region of the semiconductor substrate. A first portion of the dielectric layer between the first composite conductive feature and the second composite conductive feature is separated from the semiconductor substrate by an air gap, and a second portion of the dielectric layer between the third composite conductive feature and the fourth composite conductive feature is in direct contact with the semiconductor substrate.

公开(公告)号：US12119302B2

公开(公告)日：2024-10-15

申请号：US17698509

申请日：2022-03-18

申请人： NANYA TECHNOLOGY CORPORATION

发明人： Te-Yin Chen

IPC分类号： H01L23/535 ,  H01L21/768 ,  H01L23/532

CPC分类号： H01L23/535 ,  H01L21/76805 ,  H01L21/7682 ,  H01L21/76843 ,  H01L21/76895 ,  H01L23/5329

摘要： The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate having plurality of contacts, a plurality of composite plugs positioned above the plurality of contacts, a plurality of metal spacers positioned above the substrate; and a plurality of air gaps positioned above the substrate. At least one of the plurality of composite plugs includes a protection liner having a U-shaped profile and a metal plug in the protection liner, and the protection liner is in direct contact with one of the plurality of contacts.

公开(公告)号：US20240339355A1

公开(公告)日：2024-10-10

申请号：US18743574

申请日：2024-06-14

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Meng-Yu LIN ,  Zhiqiang WU ,  Chung-Wei WU ,  Chun-Fu CHENG

IPC分类号： H01L21/768 ,  H01L21/02

CPC分类号： H01L21/76802 ,  H01L21/0217 ,  H01L21/02362 ,  H01L21/7682 ,  H01L21/76832 ,  H01L21/76897

摘要： The present disclosure describes a method of fabricating a semiconductor structure that includes forming a dummy gate structure over a substrate, forming a first spacer on a sidewall of the dummy gate structure and a second spacer on the first spacer, forming a source/drain structure on the substrate, removing the second spacer, forming a dielectric structure over the source/drain structure, replacing the dummy gate structure with a metal gate structure and a capping structure on the metal gate structure, and forming an opening in the dielectric structure. The opening exposes the source/drain structure. The method further includes forming a dummy spacer on a sidewall of the opening, forming a contact structure in the opening, and removing the dummy spacer to form an air gap between the contact structure and the metal gate structure. The contact structure is in contact with the source/drain structure in the opening.

公开(公告)号：US20240332067A1

公开(公告)日：2024-10-03

申请号：US18739344

申请日：2024-06-11

申请人： UNITED MICROELECTRONICS CORP.

发明人： Yunfei Li ,  Ji Feng ,  Guohai Zhang ,  Ching Hwa Tey

IPC分类号： H01L21/768 ,  H01L21/02 ,  H01L23/532 ,  H01L23/535

CPC分类号： H01L21/7682 ,  H01L21/02063 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76895 ,  H01L23/5329 ,  H01L23/535

摘要： A transistor structure with an air gap includes a substrate. A transistor is disposed on the substrate. An etching stop layer covers and contacts the transistor and the substrate. A first dielectric layer covers and contacts the etching stop layer. A second dielectric layer covers the first dielectric layer. A trench is disposed on the gate structure and within the first dielectric layer and the second dielectric layer. A width of the trench within the second dielectric layer is smaller than a width of the trench within the first dielectric layer. A filling layer is disposed within the trench and covers the top surface of the second dielectric layer. An air gap is formed within the filling layer.

公开(公告)号：US20240332066A1

公开(公告)日：2024-10-03

申请号：US18136888

申请日：2023-04-20

申请人： UNITED MICROELECTRONICS CORP.

发明人： Da-Jun Lin ,  Chih-Wei Chang ,  Fu-Yu Tsai ,  Bin-Siang Tsai

IPC分类号： H01L21/768 ,  H01L23/532

CPC分类号： H01L21/7682 ,  H01L21/76832 ,  H01L23/53238

摘要： A semiconductor structure includes a substrate; a first dielectric layer on the substrate; an etch stop layer on the first dielectric layer; a second dielectric layer on the etch stop layer; a first conductor and a second conductor in the second dielectric layer, an air gap in the second dielectric layer and between the first conductor and the second conductor; and a low-polarity dielectric layer on a sidewall surface of the second dielectric layer within the air gap.

公开(公告)号：US20240321631A1

公开(公告)日：2024-09-26

申请号：US18190024

申请日：2023-03-24

申请人： QUALCOMM Incorporated

发明人： Xia LI ,  Junjing BAO ,  Bin YANG ,  Biswa Ranjan PANDA ,  Ramesh MANCHANA

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC分类号： H01L21/7682 ,  H01L21/76802 ,  H01L21/76829 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53257 ,  H01L23/5329

摘要： An integrated circuit (IC) includes back-end-of-line (BEOL) interconnects in a first intermetal dielectric (IMD) layer on a substrate. The IC also includes second BEOL interconnects on the first IMD layer, coupled to the first BEOL interconnects through first BEOL vias in the first IMD layer. The IC further includes a second IMD layer on the second BEOL interconnects to seal airgaps between the plurality of second BEOL interconnects. The IC also includes etch stop spacers on portions of sidewalls of the second BEOL interconnects to separate the portions of the sidewalls from the second IMD layer. The IC further includes third BEOL interconnects on the second IMD layer and coupled to one or more of the second BEOL interconnects through second BEOL vias in the second IMD layer.

公开(公告)号：US12094774B2

公开(公告)日：2024-09-17

申请号：US17474292

申请日：2021-09-14

申请人： International Business Machines Corporation

发明人： Yann Mignot ,  Yongan Xu ,  Hsueh-Chung Chen

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/528

CPC分类号： H01L21/76885 ,  H01L21/76816 ,  H01L21/7682 ,  H01L21/76834 ,  H01L23/5226 ,  H01L23/5283

摘要： Embodiments of the present invention are directed to fabrication methods and resulting structures having a back-end-of-line (BEOL) single damascene (SD) top via spacer defined by pillar mandrels. In a non-limiting embodiment of the invention, a first conductive line is formed in a first dielectric layer. A mandrel is formed over the first conductive line and a spacer is formed on a sidewall of the mandrel. A portion of a second dielectric layer is recessed to expose a top surface of the spacer and a top surface of the mandrel and the mandrel is removed. The spacer prevents damage to the second dielectric layer while removing the mandrel. The mandrel is replaced with a conductive material. A first portion of the conductive material defines a via and a second portion of the conductive material defines a second conductive line. The via couples the first conductive line to the second conductive line.