TRANSISTOR WITH ASYMMETRY FOR DATA STORAGE CIRCUITRY
    81.
    发明申请
    TRANSISTOR WITH ASYMMETRY FOR DATA STORAGE CIRCUITRY 有权
    不对称数据存储电路的晶体管

    公开(公告)号:US20080026529A1

    公开(公告)日:2008-01-31

    申请号:US11460782

    申请日:2006-07-28

    IPC分类号: H01L21/8234

    摘要: A transistor having a source with higher resistance than its drain is optimal as a pull-up device in a storage circuit. The transistor has a source region having a source implant having a source resistance. The source region is not salicided. A control electrode region is adjacent the source region for controlling electrical conduction of the transistor. A drain region is adjacent the control electrode region and opposite the source region. The drain region has a drain implant that is salicided and has a drain resistance. The source resistance is more than the drain resistance because the source region having a physical property that differs from the drain region.

    摘要翻译: 具有比漏极更高电阻的源极的晶体管作为存储电路中的上拉器件是最佳的。 晶体管具有源极区域,源极源极具有源极电阻。 来源地区没有水淹。 控制电极区域与源极区域相邻,用于控制晶体管的导电。 漏极区域与控制电极区域相邻并与源极区域相对。 漏极区域具有被浸没并具有漏极电阻的漏极注入。 源极电阻大于漏极电阻,因为源极区域具有不同于漏极区域的物理性质。