Data property-based data placement in a nonvolatile memory device

    公开(公告)号:US11461010B2

    公开(公告)日:2022-10-04

    申请号:US15144588

    申请日:2016-05-02

    Abstract: Example embodiments are described for data property-based data placement inside a nonvolatile memory device performed by a storage controller of the nonvolatile memory device. In one aspect, the embodiments include: executing a software component on the computer device that detects at least one of an executing application and a hardware device connecting to the computing device; responsive to detecting the at least one executing application and the hardware device, searching, by the software component, a workflow repository to find a predetermined workflow associated with the at least one executing application and the hardware device, wherein the predetermined workflow associates predefined data property identifiers to different types of data items written to the nonvolatile memory device by the executing application or the hardware device; comparing, by the software component, activities of the at least one executing application and the hardware device to the predetermined workflow; and using the predetermined workflow to automatically assign the data property identifiers to the data items used by the application or the hardware device, such that the data items and assigned data property identifiers are transmitted over a channel to the nonvolatile memory device for storage wherein the nonvolatile memory device reads the data property identifiers and identifies which blocks of the nonvolatile memory device to store the corresponding data items, such that the data items having the same data property identifiers are stored in a same block.

    System and method for LBA-based raid

    公开(公告)号:US11237977B2

    公开(公告)日:2022-02-01

    申请号:US16870344

    申请日:2020-05-08

    Abstract: A system and method for an LBA RAID storage device. The LBA RAID storage device includes a plurality of data channels and a plurality of storage components. Each of the storage components is connected to one of the plurality of data channels. A storage controller is configured to receive a data and write the data to a RAID group made up of at least two storage components of the plurality of storage components that are each connected to a separate data channel.

    Electronic system with storage management mechanism and method of operation thereof

    公开(公告)号:US10747443B2

    公开(公告)日:2020-08-18

    申请号:US16397543

    申请日:2019-04-29

    Abstract: An electronic system includes: a key value storage device, configured to transfer user data, the key value storage device including: a non-volatile memory array accessed by a key value address, an interface circuit, coupled to the non-volatile memory array, configured to receive a key value transfer command, a volatile memory, coupled to the interface circuit and the non-volatile memory array, configured to reduce a number of copies of the user data in the non-volatile memory array, and a device processor, coupled to the interface circuit, configured to manage the non-volatile memory array, the volatile memory, and the interface circuit by a key value index tree, including a key value translation block, to access the user data.

    Garbage collection—automatic data placement

    公开(公告)号:US10698808B2

    公开(公告)日:2020-06-30

    申请号:US15620814

    申请日:2017-06-12

    Abstract: A Solid State Drive (SSD) is disclosed. The SSD may include flash memory to store data. An SSD controller may manage reading and writing data to the flash memory. The SSD may include an automatic stream detection logic to select a stream identifier responsive to attributes of data. A garbage collection logic may select an erase block and program valid data in the erase block into a second block responsive to a stream ID determined the automatic stream detection logic. The stream ID may be determined after the garbage collection logic has selected the erase block for garbage collection.

    Multi-stream SSD QoS management
    87.
    发明授权

    公开(公告)号:US10592171B2

    公开(公告)日:2020-03-17

    申请号:US15167974

    申请日:2016-05-27

    Abstract: A system and method for satisfying Quality of Service (QoS) attributes (620) for a stream (405, 410) using a storage device (120) with multi-stream capability is described. The storage device (120) may include memory (510, 515, 520) to store data. A host interface (525) may receive requests (345, 350, 415, 420, 425, 430, 435, 440), some of which may be associated with a stream (405, 410). A host interface layer (545) may schedule the requests (345, 350, 415, 420, 425, 430, 435, 440) in a manner that may satisfy the QoS attribute (620) for the stream (405, 410).

    HEURISTIC INTERFACE FOR ENABLING A COMPUTER DEVICE TO UTILIZE DATA PROPERTY-BASED DATA PLACEMENT INSIDE A NONVOLATILE MEMORY DEVICE

    公开(公告)号:US20200073856A1

    公开(公告)日:2020-03-05

    申请号:US16676356

    申请日:2019-11-06

    Abstract: An interface for enabling a computer device to utilize data property-based data placement inside a nonvolatile memory device comprises: executing a software component at an operating system level in the computer device that monitors update statistics of all data item modifications into the nonvolatile memory device, including one or more of update frequencies for each data item, accumulated update and delete frequencies specific to each file type, and an origin of the data item; storing the update statistics of each of the data items and each of the data item types in a database; and intercepting all operations, including create, write, and update, of performed by applications to all the data items, and automatically assigning a data property identifier to each of the data items based on current update statistics in the database, such that the data items and assigned data property identifiers are transmitted over a memory channel to the non-volatile memory device.

    MULTI-PORT MEMORY DEVICE AND A METHOD OF USING THE SAME

    公开(公告)号:US20190130951A1

    公开(公告)日:2019-05-02

    申请号:US16234362

    申请日:2018-12-27

    Abstract: A multi-port memory device in communication with a controller includes a memory array for storing data provided by the controller, a first port coupled to the controller via a first controller channel, a second port coupled to the controller via a second controller channel, a processor, and a processor memory local to the processor, wherein the processor memory has stored thereon instructions that, when executed by the processor, cause the processor to: enable data transfer through the first port and/or the second port in response to a first control signal received from the first controller channel and/or a second control signal received from second controller channel, decode at least one of the received first and second control signals to identify a data operation to perform, the identified data operation including a read or write operation from or to the memory array, and execute the identified data operation.

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