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    MULTI-PORT MEMORY DEVICE AND A METHOD OF USING THE SAME
    1.
    发明公开
    MULTI-PORT MEMORY DEVICE AND A METHOD OF USING THE SAME 审中-公开

    公开(公告)号：US20240087620A1

    公开(公告)日：2024-03-14

    申请号：US18509082

    申请日：2023-11-14

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hingkwan Huen ,  Changho Choi

    IPC: G11C7/10 ,  G06F3/06

    CPC classification number: G11C7/1075 ,  G06F3/0613 ,  G06F3/0659 ,  G06F3/0685

    Abstract: A multi-port memory device in communication with a controller includes a memory array for storing data provided by the controller, a first port coupled to the controller via a first controller channel, a second port coupled to the controller via a second controller channel, a processor, and a processor memory local to the processor, wherein the processor memory has stored thereon instructions that, when executed by the processor, cause the processor to: enable data transfer through the first port and/or the second port in response to a first control signal received from the first controller channel and/or a second control signal received from second controller channel, decode at least one of the received first and second control signals to identify a data operation to perform, the identified data operation including a read or write operation from or to the memory array, and execute the identified data operation.

    Multi-port memory device and a method of using the same
    2.
    发明授权
    Multi-port memory device and a method of using the same 有权

    公开(公告)号：US10255955B2

    公开(公告)日：2019-04-09

    申请号：US15097234

    申请日：2016-04-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hingkwan Huen ,  Changho Choi

    IPC: G06F12/12 ,  G11C7/10 ,  G06F3/06

    Abstract: A multi-port memory device in communication with a controller includes a memory array for storing data provided by the controller, a first port coupled to the controller via a first controller channel, a second port coupled to the controller via a second controller channel, a processor, and a processor memory local to the processor, wherein the processor memory has stored thereon instructions that, when executed by the processor, cause the processor to: enable data transfer through the first port and/or the second port in response to a first control signal received from the first controller channel and/or a second control signal received from second controller channel, decode at least one of the received first and second control signals to identify a data operation to perform, the identified data operation including a read or write operation from or to the memory array, and execute the identified data operation.

    MULTI-PORT MEMORY DEVICE AND A METHOD OF USING THE SAME
    3.
    发明申请
    MULTI-PORT MEMORY DEVICE AND A METHOD OF USING THE SAME 审中-公开

    公开(公告)号：US20170229159A1

    公开(公告)日：2017-08-10

    申请号：US15097234

    申请日：2016-04-12

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hingkwan Huen ,  Changho Choi

    IPC: G11C7/10 ,  G06F3/06

    CPC classification number: G11C7/1075 ,  G06F3/0613 ,  G06F3/0659 ,  G06F3/0685

    Abstract: A multi-port memory device in communication with a controller includes a memory array for storing data provided by the controller, a first port coupled to the controller via a first controller channel, a second port coupled to the controller via a second controller channel, a processor, and a processor memory local to the processor, wherein the processor memory has stored thereon instructions that, when executed by the processor, cause the processor to: enable data transfer through the first port and/or the second port in response to a first control signal received from the first controller channel and/or a second control signal received from second controller channel, decode at least one of the received first and second control signals to identify a data operation to perform, the identified data operation including a read or write operation from or to the memory array, and execute the identified data operation.

    Method of consolidating data streams for multi-stream enabled SSDs
    5.
    发明授权
    Method of consolidating data streams for multi-stream enabled SSDs 有权

    公开(公告)号：US11048411B2

    公开(公告)日：2021-06-29

    申请号：US16866545

    申请日：2020-05-04

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hingkwan Huen ,  Changho Choi

    IPC: G06F3/06

    Abstract: A Solid State Drive (SSD) is disclosed. The SSD may include a flash memory to store data and support for a number of device streams. The SSD may also include an SSD controller to manage reading data from and writing data to the flash memory. The SSD may also include a host interface logic, which may include a receiver to receive the commands associated with software streams from a host, a timer to time a window, a statistics collector to determine values for at least one criterion for the software streams from the commands, a ranker to rank the software streams according to the values, and a mapper to establish a mapping between the software streams and device streams.

    Method of consolidate data streams for multi-stream enabled SSDs
    6.
    发明授权
    Method of consolidate data streams for multi-stream enabled SSDs 有权

    公开(公告)号：US10739995B2

    公开(公告)日：2020-08-11

    申请号：US16219936

    申请日：2018-12-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hingkwan Huen ,  Changho Choi

    IPC: G06F12/00 ,  G06F3/06

    Abstract: A Solid State Drive (SSD) is disclosed. The SSD may include a flash memory to store data and support for a number of device streams. The SSD may also include an SSD controller to manage reading data from and writing data to the flash memory. The SSD may also include a host interface logic, which may include a receiver to receive the commands associated with software streams from a host, a timer to time a window, a statistics collector to determine values for at least one criterion for the software streams from the commands, a ranker to rank the software streams according to the values, and a mapper to establish a mapping between the software streams and device streams.

    DATA PROPERTY-BASED DATA PLACEMENT IN A NONVOLATILE MEMORY DEVICE
    8.
    发明申请
    DATA PROPERTY-BASED DATA PLACEMENT IN A NONVOLATILE MEMORY DEVICE 审中-公开
    基于数据属性的数据放置在非易失性存储器件中

    公开(公告)号：US20170017411A1

    公开(公告)日：2017-01-19

    申请号：US15144588

    申请日：2016-05-02

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Changho Choi ,  Jianjian Huo ,  Derrick Tseng ,  Praveen Krishnamoorthy ,  Hingkwan Huen

    IPC: G06F3/06 ,  G06F12/02

    CPC classification number: G06F3/0611 ,  G06F3/064 ,  G06F3/0688 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/7202 ,  G06F2212/7205

    Abstract: Example embodiments are described for data property-based data placement inside a nonvolatile memory device performed by a storage controller of the nonvolatile memory device. In one aspect, the embodiments include: executing a software component on the computer device that detects at least one of an executing application and a hardware device connecting to the computing device; responsive to detecting the at least one executing application and the hardware device, searching, by the software component, a workflow repository to find a predetermined workflow associated with the at least one executing application and the hardware device, wherein the predetermined workflow associates predefined data property identifiers to different types of data items written to the nonvolatile memory device by the executing application or the hardware device; comparing, by the software component, activities of the at least one executing application and the hardware device to the predetermined workflow; and using the predetermined workflow to automatically assign the data property identifiers to the data items used by the application or the hardware device, such that the data items and assigned data property identifiers are transmitted over a channel to the nonvolatile memory device for storage wherein the nonvolatile memory device reads the data property identifiers and identifies which blocks of the nonvolatile memory device to store the corresponding data items, such that the data items having the same data property identifiers are stored in a same block.

    Abstract translation: 对由非易失性存储器件的存储控制器执行的非易失性存储器件内的基于数据属性的数据放置进行描述。 在一个方面，实施例包括：在计算机设备上执行检测执行应用程序和连接到计算设备的硬件设备中的至少一个的软件组件; 响应于检测所述至少一个执行应用程序和所述硬件设备，由所述软件组件搜索工作流存储库以找到与所述至少一个执行应用程序和所述硬件设备相关联的预定工作流，其中所述预定工作流程将预定义的数据属性 由执行应用程序或硬件设备写入非易失性存储器件的不同类型数据项的标识符; 将所述软件组件比较所述至少一个执行应用程序和所述硬件设备的活动到所述预定工作流程; 并且使用预定工作流程将数据属性标识符自动分配给应用程序或硬件设备使用的数据项，使得数据项和分配的数据属性标识符通过一个通道发送到非易失性存储器件以进行存储，其中非易失性存储器 存储器设备读取数据属性标识符并识别非易失性存储器件的哪个块存储对应的数据项，使得具有相同数据属性标识符的数据项被存储在相同的块中。

    SYSTEMS AND METHODS FOR DEMAND-BASED STORAGE
    9.
    发明申请
    SYSTEMS AND METHODS FOR DEMAND-BASED STORAGE 有权

    公开(公告)号：US20240419585A1

    公开(公告)日：2024-12-19

    申请号：US18233587

    申请日：2023-08-14

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ramdas Kachare ,  Hingkwan Huen ,  Luis Vitorio Cargnini ,  Hrishikesh Sathawane

    IPC: G06F12/02 ,  G06F21/44

    Abstract: Systems and methods for demand-based storage are disclosed. A first storage device is coupled to a first computing device over a first link. The first storage device includes a storage medium and a processing circuit connected to the storage medium. The processing circuit may be configured to: receive a first request for a first storage capacity; transmit a second request for allocating at least a portion of the first storage capacity on a second storage device configured to communicate with the first storage device over a second link; receive a first storage command from the first computing device; generate a second storage command based on the first storage command; and transmit the second storage command to the second storage device for execution of the second storage command by the second storage device.

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