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公开(公告)号:US09971686B2
公开(公告)日:2018-05-15
申请号:US14628954
申请日:2015-02-23
申请人: Intel Corporation
发明人: Kshitij A. Doshi , Thomas Willhalm
IPC分类号: G06F12/08 , G06F12/0804 , G06F12/0811 , G06F12/0815 , G06F9/30 , G06F12/084
CPC分类号: G06F12/0804 , G06F9/30036 , G06F9/30043 , G06F9/30047 , G06F9/30192 , G06F12/0811 , G06F12/0815 , G06F12/084 , G06F2212/1024 , G06F2212/452 , G06F2212/621
摘要: A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode a vector cache line write back instruction. The vector cache line write back instruction is to indicate a source packed memory indices operand that is to include a plurality of memory indices. The processor also includes a cache coherency system coupled with the packed data registers and the decode unit. The cache coherency system, in response to the vector cache line write back instruction, to cause, any dirty cache lines, in any caches in a coherency domain, which are to have stored therein data for any of a plurality of memory addresses that are to be indicated by any of the memory indices of the source packed memory indices operand, to be written back toward one or more memories. Other processors, methods, and systems are also disclosed.
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2.
公开(公告)号:US09904547B2
公开(公告)日:2018-02-27
申请号:US13977217
申请日:2011-12-22
IPC分类号: G06F9/30
CPC分类号: G06F9/30043 , G06F9/30032 , G06F9/30036 , G06F9/30163 , G06F9/30167 , G06F9/3455
摘要: A method of an aspect includes receiving a packed data rearrangement control indexes generation instruction. The packed data rearrangement control indexes generation instruction indicates a destination storage location. A result is stored in the destination storage location in response to the packed data rearrangement control indexes generation instruction. The result includes a sequence of at least four non-negative integers representing packed data rearrangement control indexes. In an aspect, values of the at least four non-negative integers are not calculated using a result of a preceding instruction. Other methods, apparatus, systems, and instructions are disclosed.
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公开(公告)号:US09898283B2
公开(公告)日:2018-02-20
申请号:US13976580
申请日:2011-12-22
IPC分类号: G06F9/30
CPC分类号: G06F9/3001 , G06F9/30032 , G06F9/30036 , G06F9/30163 , G06F9/30167 , G06F9/3455
摘要: A method of an aspect includes receiving an instruction. The instruction indicates an integer stride, indicates an integer offset, and indicates a destination storage location. A result is stored in the destination storage location in response to the instruction. The result includes a sequence of at least four integers in numerical order with a smallest one of the at least four integers differing from zero by the integer offset and with all integers of the sequence in consecutive positions differing by the integer stride. Other methods, apparatus, systems, and instructions are disclosed.
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