公开(公告)号：US4884118A

公开(公告)日：1989-11-28

申请号：US158066

申请日：1988-02-12

申请人： Alex C. Hui ,  Anthony Y. Wong ,  Conrad J. Dell'Oca ,  Daniel Wong ,  Roger Szeto

发明人： Alex C. Hui ,  Anthony Y. Wong ,  Conrad J. Dell'Oca ,  Daniel Wong ,  Roger Szeto

IPC分类号： H01L27/118

CPC分类号： H01L27/11807

摘要： A gate array is provided in which active areas within the substrate are arranged in alternating columns of opposite conductivity type and symmetrical about the center lines through each column so that CMOS devices can be advantageously formed by allocating only small increments of active area to metal routing. The substrate and well taps are also symmetrical about the column center line. The active area symmetry allows p-channel and n-channel transistors to be combined where the p-channel transistor is on either the right or left, thus increasing the flexibility in placing the elements within the integrated circuit chip.

摘要翻译： 提供了一种栅极阵列，其中衬底内的有源区域被布置在相反导电类型的交替列中，并且通过每一列关于中心线对称，使得可以通过仅将小的有效面积的增量分配给金属布线来有利地形成CMOS器件。 衬底和阱抽头也关于柱中心线对称。 有源区对称性允许p沟道晶体管和n沟道晶体管组合在p沟道晶体管位于右侧或左侧，从而增加将元件放置在集成电路芯片内的灵活性。