Resilience to memory errors with firmware assistance
    2.
    发明授权
    Resilience to memory errors with firmware assistance 失效
    通过固件帮助恢复内存错误

    公开(公告)号:US07895477B2

    公开(公告)日:2011-02-22

    申请号:US12132135

    申请日:2008-06-03

    IPC分类号: G06F11/00

    摘要: Embodiments of the invention provide an interrupt handler configured to distinguish between critical and non-critical unrecoverable memory errors, yielding different actions for each. Doing so may allow a system to recover from certain memory errors without having to terminate a running process. In addition, when an operating system critical task experiences an unrecoverable error, such a task may be acting on behalf of a non-critical process (e.g., when swapping out a virtual memory page). When this occurs, an interrupt handler may respond to a memory error with the same response that would result had the process itself performed the memory operation. Further, firmware may be configured to perform diagnostics to identify potential memory errors and alert the operating system before a memory region state change occurs, such that the memory error would become critical.

    摘要翻译: 本发明的实施例提供了一种中断处理器,其被配置为区分关键和非关键不可恢复的存储器错误,为每个存储器错误产生不同的动作。 这样做可能允许系统从某些内存错误中恢复,而不必终止正在运行的进程。 此外,当操作系统关键任务遇到不可恢复的错误时,这样的任务可以代表非关键过程(例如,当交换出虚拟存储器页面时)起作用。 当这种情况发生时,中断处理程序可以响应存储器错误,具有相同的响应,这将导致进程本身执行存储器操作。 此外,固件可以被配置为执行诊断以识别潜在的存储器错误并且在发生存储器区域状态改变之前警告操作系统,使得存储器错误将变得至关重要。

    Method and computer program product for determining a minimally degraded configuration when failures occur along connections
    3.
    发明授权
    Method and computer program product for determining a minimally degraded configuration when failures occur along connections 有权
    当连接出现故障时,用于确定最低劣化配置的方法和计算机程序产品

    公开(公告)号:US07698601B2

    公开(公告)日:2010-04-13

    申请号:US11777681

    申请日:2007-07-13

    IPC分类号: G06F11/00

    CPC分类号: G06F11/0793 G06F11/2007

    摘要: A minimally degraded configuration is determined when failing connections occur. Associative deconfigurations are determined from deconfiguring hardware items in a server system, associative groups are derived, and failed connections are determined. Failed connections are determined between two hardware items that are in the same associative group, and the two hardware items at both endpoints of the failed connection are deconfigured. Each associative group state is set to unknown, and the failed connections are counted where a single endpoint of the failed connection is within the associative group. The associative group state is set to deconfigured, if a member of the associative group was deconfigured. Counts of the associative groups that remain in the unknown state are analyzed, and the associative group with the smallest failed connection count is selected and set to a configured state. The other associative group at the other end is set to a deconfigured stated, and the hardware item in the other associative group is deconfigured.

    摘要翻译: 当发生故障连接时,确定最小退化配置。 通过解除配置服务器系统中的硬件项目,导出关联组,确定失败的连接来确定关联解构造。 在同一关联组中的两个硬件项之间确定失败的连接,并且解除配置失败连接的两个端点的两个硬件项。 每个关联组状态设置为未知,并且失败的连接计数在失败连接的单个端点在关联组内。 如果关联组的成员被取消配置,则关联组状态将被设置为解除配置。 分析保持在未知状态的关联组的计数,并选择具有最小失败连接数的关联组并将其设置为配置状态。 另一方的另一个关联组被设置为解除配置,并且其他关联组中的硬件项被解除配置。

    Clearing Interrupts Raised While Performing Operating System Critical Tasks
    4.
    发明申请
    Clearing Interrupts Raised While Performing Operating System Critical Tasks 失效
    在执行操作系统关键任务时清除中断

    公开(公告)号:US20090300434A1

    公开(公告)日:2009-12-03

    申请号:US12132124

    申请日:2008-06-03

    IPC分类号: G06F11/00

    摘要: Embodiments of the invention provide an interrupt handler configured to distinguish between critical and non-critical unrecoverable memory errors, yielding different actions for each. Doing so may allow a system to recover from certain memory errors without having to terminate a running process. In addition, when an operating system critical task experiences an unrecoverable error, such a task may be acting on behalf of a non-critical process (e.g., when swapping out a virtual memory page). When this occurs, an interrupt handler may respond to a memory error with the same response that would result had the process itself performed the memory operation. Further, firmware may be configured to perform diagnostics to identify potential memory errors and alert the operating system before a memory region state change occurs, such that the memory error would become critical.

    摘要翻译: 本发明的实施例提供了一种中断处理器,其被配置为区分关键和非关键不可恢复的存储器错误,为每个存储器错误产生不同的动作。 这样做可能允许系统从某些内存错误中恢复,而不必终止正在运行的进程。 此外,当操作系统关键任务遇到不可恢复的错误时,这样的任务可以代表非关键过程(例如,当交换出虚拟存储器页面时)起作用。 当这种情况发生时,中断处理程序可以响应存储器错误,具有相同的响应,这将导致进程本身执行存储器操作。 此外,固件可以被配置为执行诊断以识别潜在的存储器错误并且在发生存储器区域状态改变之前警告操作系统,使得存储器错误将变得至关重要。

    Resilience to Memory Errors with Firmware Assistance
    5.
    发明申请
    Resilience to Memory Errors with Firmware Assistance 失效
    使用固件协助恢复内存错误

    公开(公告)号:US20090300425A1

    公开(公告)日:2009-12-03

    申请号:US12132135

    申请日:2008-06-03

    IPC分类号: G06F11/00

    摘要: Embodiments of the invention provide an interrupt handler configured to distinguish between critical and non-critical unrecoverable memory errors, yielding different actions for each. Doing so may allow a system to recover from certain memory errors without having to terminate a running process. In addition, when an operating system critical task experiences an unrecoverable error, such a task may be acting on behalf of a non-critical process (e.g., when swapping out a virtual memory page). When this occurs, an interrupt handler may respond to a memory error with the same response that would result had the process itself performed the memory operation. Further, firmware may be configured to perform diagnostics to identify potential memory errors and alert the operating system before a memory region state change occurs, such that the memory error would become critical.

    摘要翻译: 本发明的实施例提供了一种中断处理器,其被配置为区分关键和非关键不可恢复的存储器错误,为每个存储器错误产生不同的动作。 这样做可能允许系统从某些内存错误中恢复,而不必终止正在运行的进程。 此外,当操作系统关键任务遇到不可恢复的错误时,这样的任务可以代表非关键过程(例如,当交换出虚拟存储器页面时)起作用。 当这种情况发生时,中断处理程序可以响应存储器错误,具有相同的响应,这将导致进程本身执行存储器操作。 此外,固件可以被配置为执行诊断以识别潜在的存储器错误并且在发生存储器区域状态改变之前警告操作系统,使得存储器错误将变得至关重要。

    Dynamically adding additional masters onto multi-mastered IIC buses with tunable performance
    6.
    发明授权
    Dynamically adding additional masters onto multi-mastered IIC buses with tunable performance 失效
    动态地将额外的主机添加到具有可调性能的多主控IIC总线上

    公开(公告)号:US07502953B2

    公开(公告)日:2009-03-10

    申请号:US11326567

    申请日:2006-01-05

    IPC分类号: G06F1/12

    CPC分类号: G06F13/376 G06F13/4291

    摘要: A method for coupling a collection of master devices on an Inter-Integrated Circuit (IIC) bus, where the collection of master devices includes at least one resident master device, generating a periodic, fixed interval tenure on the IIC bus, synchronizing at least one additional master device with the periodic, fixed interval tenure to enable the at least one additional master device to communicate on the IIC bus, and tuning a period value corresponding to a frequency of the periodic, fixed interval tenure to optimize the synchronizing, wherein the tuning further includes adjusting the period value to vary the frequency of the periodic, fixed interval tenure to balance between available IIC bus bandwidth and synchronization of the at least one additional master device.

    摘要翻译: 一种用于在集成电路(IIC)总线上耦合主设备的集合的方法,其中所述主设备的集合包括至少一个驻留主设备,在所述IIC总线上生成周期性的固定间隔任期,同步至少一个 具有周期性,固定间隔使用期的附加主设备,以使所述至少一个附加主设备能够在IIC总线上通信,以及调整对应于所述周期性固定间隔任期的频率的周期值,以优化所述同步,其中所述调谐 进一步包括调整周期值以改变周期性固定间隔期限的频率以在可用IIC总线带宽与所述至少一个附加主设备的同步之间进行平衡。

    CONVERSION OF TIMESTAMPS BETWEEN MULTIPLE ENTITIES WITHIN A COMPUTING SYSTEM
    7.
    发明申请
    CONVERSION OF TIMESTAMPS BETWEEN MULTIPLE ENTITIES WITHIN A COMPUTING SYSTEM 有权
    计算机系统中多个实体之间的时间转换

    公开(公告)号:US20120266010A1

    公开(公告)日:2012-10-18

    申请号:US13087106

    申请日:2011-04-14

    IPC分类号: G06F1/08

    CPC分类号: G06F1/14 G06F1/10

    摘要: Method, apparatus and system are described for converting received timestamps to a time-recording standard recognized by the receiving computing system. Embodiments of the invention generally include receiving data from an external device that includes a timestamp. If the received data is the first communication from the external device, creating a time base used for converting subsequently received timestamps to a recognized standard. Moreover, the system updates the time base if a counter failure at the external device is detected. When the external device transmits subsequent data, the time base is added to the subsequently received timestamps to convert the subsequent timestamps to a time-recording standard recognized by the computing system.

    摘要翻译: 描述了将接收的时间戳转换成由接收计算系统识别的时间记录标准的方法,装置和系统。 本发明的实施例通常包括从包括时间戳的外部设备接收数据。 如果接收到的数据是来自外部设备的第一通信,则创建用于将随后接收的时间戳转换为已识别标准的时基。 此外,如果检测到外部设备的计数器故障,系统将更新时基。 当外部设备发送后续数据时,将时基添加到随后接收的时间戳中,以将后续时间戳转换为由计算系统识别的时间记录标准。

    Memory Metadata Used to Handle Memory Errors Without Process Termination
    8.
    发明申请
    Memory Metadata Used to Handle Memory Errors Without Process Termination 失效
    用于处理无过程终止的内存错误的内存元数据

    公开(公告)号:US20090300290A1

    公开(公告)日:2009-12-03

    申请号:US12132112

    申请日:2008-06-03

    IPC分类号: G06F12/12

    摘要: Embodiments of the invention provide an interrupt handler configured to distinguish between critical and non-critical unrecoverable memory errors, yielding different actions for each. Doing so may allow a system to recover from certain memory errors without having to terminate a running process. In addition, when an operating system critical task experiences an unrecoverable error, such a task may be acting on behalf of a non-critical process (e.g., when swapping out a virtual memory page). When this occurs, an interrupt handler may respond to a memory error with the same response that would result had the process itself performed the memory operation. Further, firmware may be configured to perform diagnostics to identify potential memory errors and alert the operating system before a memory region state change occurs, such that the memory error would become critical.

    摘要翻译: 本发明的实施例提供了一种中断处理器,其被配置为区分关键和非关键不可恢复的存储器错误,为每个存储器错误产生不同的动作。 这样做可能允许系统从某些内存错误中恢复,而不必终止正在运行的进程。 此外,当操作系统关键任务遇到不可恢复的错误时,这样的任务可以代表非关键过程(例如,当交换出虚拟存储器页面时)起作用。 当这种情况发生时,中断处理程序可以响应存储器错误,具有相同的响应,这将导致进程本身执行存储器操作。 此外,固件可以被配置为执行诊断以识别潜在的存储器错误并且在发生存储器区域状态改变之前警告操作系统,使得存储器错误将变得至关重要。

    Conversion of timestamps between multiple entities within a computing system
    9.
    发明授权
    Conversion of timestamps between multiple entities within a computing system 有权
    在计算系统内的多个实体之间转换时间戳

    公开(公告)号:US08578200B2

    公开(公告)日:2013-11-05

    申请号:US13087106

    申请日:2011-04-14

    IPC分类号: G06F1/00 G06F1/04 G06F1/12

    CPC分类号: G06F1/14 G06F1/10

    摘要: Method, apparatus and system are described for converting received timestamps to a time-recording standard recognized by the receiving computing system. Embodiments of the invention generally include receiving data from an external device that includes a timestamp. If the received data is the first communication from the external device, creating a time base used for converting subsequently received timestamps to a recognized standard. Moreover, the system updates the time base if a counter failure at the external device is detected. When the external device transmits subsequent data, the time base is added to the subsequently received timestamps to convert the subsequent timestamps to a time-recording standard recognized by the computing system.

    摘要翻译: 描述了将接收的时间戳转换成由接收计算系统识别的时间记录标准的方法,装置和系统。 本发明的实施例通常包括从包括时间戳的外部设备接收数据。 如果接收到的数据是来自外部设备的第一通信,则创建用于将随后接收的时间戳转换为已识别标准的时基。 此外,如果检测到外部设备的计数器故障,系统将更新时基。 当外部设备发送后续数据时,将时基添加到随后接收的时间戳中,以将后续时间戳转换为由计算系统识别的时间记录标准。

    Memory metadata used to handle memory errors without process termination
    10.
    发明授权
    Memory metadata used to handle memory errors without process termination 失效
    用于处理内存错误而不进行过程终止的内存元数据

    公开(公告)号:US08195981B2

    公开(公告)日:2012-06-05

    申请号:US12132112

    申请日:2008-06-03

    IPC分类号: G06F11/00

    摘要: Embodiments of the invention provide an interrupt handler configured to distinguish between critical and non-critical unrecoverable memory errors, yielding different actions for each. Doing so may allow a system to recover from certain memory errors without having to terminate a running process. In addition, when an operating system critical task experiences an unrecoverable error, such a task may be acting on behalf of a non-critical process (e.g., when swapping out a virtual memory page). When this occurs, an interrupt handler may respond to a memory error with the same response that would result had the process itself performed the memory operation. Further, firmware may be configured to perform diagnostics to identify potential memory errors and alert the operating system before a memory region state change occurs, such that the memory error would become critical.

    摘要翻译: 本发明的实施例提供了一种中断处理器,其被配置为区分关键和非关键不可恢复的存储器错误,为每个存储器错误产生不同的动作。 这样做可能允许系统从某些内存错误中恢复,而不必终止正在运行的进程。 此外,当操作系统关键任务遇到不可恢复的错误时,这样的任务可以代表非关键过程(例如,当交换出虚拟存储器页面时)起作用。 当这种情况发生时,中断处理程序可以响应存储器错误,具有相同的响应,这将导致进程本身执行存储器操作。 此外,固件可以被配置为执行诊断以识别潜在的存储器错误并且在发生存储器区域状态改变之前警告操作系统,使得存储器错误将变得至关重要。