公开(公告)号：US20060265162A1

公开(公告)日：2006-11-23

申请号：US11123609

申请日：2005-05-04

申请人： Amelia Muro ,  Andrew Walker ,  Yeak-Chong Wong

发明人： Amelia Muro ,  Andrew Walker ,  Yeak-Chong Wong

IPC分类号： G01N37/00 ,  G06F19/00

CPC分类号： H01L21/67253 ,  H01L21/67276

摘要： A method for processing wafers in a batch processing tool that optimizes yield by minimizing within batch wafer variation in a wafer process. In a tool having a plurality of available wafer positions for a batch process, the method is useful when less than a full batch of wafers is to be processed. All of the possible wafer position combinations are determined and the within batch variation for each position combination is determined. The wafer position combination resulting in the least amount of within batch variation in the wafer process is then selected as the wafer placement combination for use in the process.

摘要翻译： 一种用于在批处理工具中处理晶片的方法，其通过最小化晶片工艺中的批次晶片变化来优化产量。 在具有用于批处理的多个可用晶片位置的工具中，当少于一批全部晶片被处理时，该方法是有用的。 确定所有可能的晶片位置组合，并确定每个位置组合的批量间变化。 然后选择晶片位置组合，使得在晶片工艺中产生最少批量变化的晶片位置组合作为在该过程中使用的晶片放置组合。