公开(公告)号：US07313776B2

公开(公告)日：2007-12-25

申请号：US11169362

申请日：2005-06-28

申请人： Neeraj Kaul ,  Balkrishna Rashingkar ,  Anthony Y. Tseng ,  Wei-Chih Tseng

发明人： Neeraj Kaul ,  Balkrishna Rashingkar ,  Anthony Y. Tseng ,  Wei-Chih Tseng

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： A system that routes nets within an integrated circuit. During operation, the system receives a representation for the integrated circuit, which includes block boundaries for physical partitions of the IC generated from a hierarchical design placement of the integrated circuit. The system then classifies each net in the integrated circuit based on the location of pins associated with the net. Next, the system generates routing constraints for each net based on the classification of the net and applies a feedthrough constraint to the physical partitions to restrict nets from feeding through physical partition boundaries. Finally, the system routes each net using the routing constraints for the net and the feedthrough constraints for the physical partitions. This routing is performed based on these block boundaries prior to finalizing the hierarchical design placement, thereby facilitating early detection of congestion or timing violations which can be corrected early in the design process.

摘要翻译： 在集成电路内布线网络的系统。 在操作期间，系统接收集成电路的表示，其包括从集成电路的分层设计放置产生的IC的物理分区的块边界。 然后，系统基于与网络相关联的引脚的位置对集成电路中的每个网进行分类。 接下来，系统基于网络的分类为每个网络生成路由约束，并且对物理分区应用馈通约束以限制网络从馈送到物理分区边界。 最后，系统使用网络的路由约束和物理分区的馈通约束路由每个网络。 在完成分层设计布置之前，基于这些块边界执行该路由，从而有助于早期检测可以在设计过程的早期纠正的拥塞或定时违规。