公开(公告)号：US08037428B2

公开(公告)日：2011-10-11

申请号：US12129617

申请日：2008-05-29

申请人： Yang-Shan Tong ,  Daniel Zhang ,  Linni Wei ,  Alex Miloslavsky ,  Wei-Chih Tseng ,  Zongwu Tang

发明人： Yang-Shan Tong ,  Daniel Zhang ,  Linni Wei ,  Alex Miloslavsky ,  Wei-Chih Tseng ,  Zongwu Tang

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F2217/12 ,  Y02P90/265

摘要： One embodiment of the present invention provides a system that verifies an integrated circuit (IC) chip layout. During operation, the system receives a layout of an IC chip after the layout has gone through a place-and-route operation. Next, the system performs a lithography compliance checking (LCC) operation on the layout to detect lithography hotspots within the layout, wherein each lithography hotspot is associated with a local routing pattern around the lithography hotspot. Next, for each detected lithography hotspot, the system compares the associated local routing pattern against a hotspot database to determine if the local routing pattern matches an entry in the hotspot database, which stores a set of known hotspot configurations. If so, the system corrects the lithography hotspot using correction guidance information associated with the hotspot configuration stored in the hotspot database. Otherwise, the system corrects the lithography hotspot by performing a local rip-up and reroute on the local routing pattern, iteratively, until achieving convergence or given number of iterations.

摘要翻译： 本发明的一个实施例提供一种验证集成电路（IC）芯片布局的系统。 在操作过程中，系统在布局经过布线操作后接收IC芯片的布局。 接下来，系统在布局上执行光刻柔性检查（LCC）操作以检测布局内的光刻热点，其中每个光刻热点与光刻热点周围的局部布线图案相关联。 接下来，对于每个检测到的光刻热点，系统将相关联的本地路由模式与热点数据库进行比较，以确定本地路由模式是否匹配热点数据库中存储一组已知热点配置的条目。 如果是，则系统使用与存储在热点数据库中的热点配置相关联的校正指导信息来校正光刻热点。 否则，系统通过对本地路由模式执行局部的rip-up和重新路由来迭代地校正光刻热点，直到达到收敛或给定的迭代次数。

公开(公告)号：US20060294485A1

公开(公告)日：2006-12-28

申请号：US11169362

申请日：2005-06-28

申请人： Neeraj Kaul ,  Balkrishna Rashingkar ,  Anthony Tseng ,  Wei-Chih Tseng

发明人： Neeraj Kaul ,  Balkrishna Rashingkar ,  Anthony Tseng ,  Wei-Chih Tseng

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： A system that routes nets within an integrated circuit. During operation, the system receives a representation for the integrated circuit, which includes block boundaries for physical partitions of the IC generated from a hierarchical design placement of the integrated circuit. The system then classifies each net in the integrated circuit based on the location of pins associated with the net. Next, the system generates routing constraints for each net based on the classification of the net and applies a feedthrough constraint to the physical partitions to restrict nets from feeding through physical partition boundaries. Finally, the system routes each net using the routing constraints for the net and the feedthrough constraints for the physical partitions. This routing is performed based on these block boundaries prior to finalizing the hierarchical design placement, thereby facilitating early detection of congestion or timing violations which can be corrected early in the design process.

摘要翻译： 在集成电路内布线网络的系统。 在操作期间，系统接收集成电路的表示，其包括从集成电路的分层设计放置产生的IC的物理分区的块边界。 然后，系统基于与网络相关联的引脚的位置对集成电路中的每个网进行分类。 接下来，系统基于网络的分类为每个网络生成路由约束，并且对物理分区应用馈通约束以限制网络从馈送到物理分区边界。 最后，系统使用网络的路由约束和物理分区的馈通约束路由每个网络。 在完成分层设计布置之前，基于这些块边界执行该路由，从而有助于早期检测可以在设计过程的早期纠正的拥塞或定时违规。

公开(公告)号：US07313776B2

公开(公告)日：2007-12-25

申请号：US11169362

申请日：2005-06-28

申请人： Neeraj Kaul ,  Balkrishna Rashingkar ,  Anthony Y. Tseng ,  Wei-Chih Tseng

发明人： Neeraj Kaul ,  Balkrishna Rashingkar ,  Anthony Y. Tseng ,  Wei-Chih Tseng

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： A system that routes nets within an integrated circuit. During operation, the system receives a representation for the integrated circuit, which includes block boundaries for physical partitions of the IC generated from a hierarchical design placement of the integrated circuit. The system then classifies each net in the integrated circuit based on the location of pins associated with the net. Next, the system generates routing constraints for each net based on the classification of the net and applies a feedthrough constraint to the physical partitions to restrict nets from feeding through physical partition boundaries. Finally, the system routes each net using the routing constraints for the net and the feedthrough constraints for the physical partitions. This routing is performed based on these block boundaries prior to finalizing the hierarchical design placement, thereby facilitating early detection of congestion or timing violations which can be corrected early in the design process.

摘要翻译： 在集成电路内布线网络的系统。 在操作期间，系统接收集成电路的表示，其包括从集成电路的分层设计放置产生的IC的物理分区的块边界。 然后，系统基于与网络相关联的引脚的位置对集成电路中的每个网进行分类。 接下来，系统基于网络的分类为每个网络生成路由约束，并且对物理分区应用馈通约束以限制网络从馈送到物理分区边界。 最后，系统使用网络的路由约束和物理分区的馈通约束路由每个网络。 在完成分层设计布置之前，基于这些块边界执行该路由，从而有助于早期检测可以在设计过程的早期纠正的拥塞或定时违规。

公开(公告)号：US20090300561A1

公开(公告)日：2009-12-03

申请号：US12129617

申请日：2008-05-29

申请人： Yang-Shan Tong ,  Daniel Zhang ,  Linni Wei ,  Alex Miloslavsky ,  Wei-Chih Tseng ,  Zongwu Tang

发明人： Yang-Shan Tong ,  Daniel Zhang ,  Linni Wei ,  Alex Miloslavsky ,  Wei-Chih Tseng ,  Zongwu Tang

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F2217/12 ,  Y02P90/265

摘要： One embodiment of the present invention provides a system that verifies an integrated circuit (IC) chip layout. During operation, the system receives a layout of an IC chip after the layout has gone through a place-and-route operation. Next, the system performs a lithography compliance checking (LCC) operation on the layout to detect lithography hotspots within the layout, wherein each lithography hotspot is associated with a local routing pattern around the lithography hotspot. Next, for each detected lithography hotspot, the system compares the associated local routing pattern against a hotspot database to determine if the local routing pattern matches an entry in the hotspot database, which stores a set of known hotspot configurations. If so, the system corrects the lithography hotspot using correction guidance information associated with the hotspot configuration stored in the hotspot database. Otherwise, the system corrects the lithography hotspot by performing a local rip-up and reroute on the local routing pattern, iteratively, until achieving convergence or given number of iterations.

摘要翻译： 本发明的一个实施例提供一种验证集成电路（IC）芯片布局的系统。 在操作过程中，系统在布局经过布线操作后接收IC芯片的布局。 接下来，系统在布局上执行光刻柔性检查（LCC）操作以检测布局内的光刻热点，其中每个光刻热点与光刻热点周围的局部布线图案相关联。 接下来，对于每个检测到的光刻热点，系统将相关联的本地路由模式与热点数据库进行比较，以确定本地路由模式是否匹配热点数据库中存储一组已知热点配置的条目。 如果是，则系统使用与存储在热点数据库中的热点配置相关联的校正指导信息来校正光刻热点。 否则，系统通过对本地路由模式执行局部的rip-up和重新路由来迭代地校正光刻热点，直到达到收敛或给定的迭代次数。