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公开(公告)号:US10778157B2
公开(公告)日:2020-09-15
申请号:US16712149
申请日:2019-12-12
申请人: BeRex Inc.
摘要: An RF receiver circuit configuration and design limited by conditions and frequencies to simultaneously provide steady state low-noise signal amplification, frequency down-conversion and image signal rejection. The invention provides combined circuits of an RF transceiver architecture that measure antenna reflected power relative to forward power using the error amplifier signal to adjust the gain of the variable gain amplifier in order to compensate for the mismatch between forward reflected power and forward power at the antenna in order to achieve constant radiated power. The RF receiver circuit may be implemented as one of a CMOS single chip device or as part of an integrated system of CMOS components.
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公开(公告)号:US11515852B1
公开(公告)日:2022-11-29
申请号:US16695202
申请日:2019-11-26
申请人: BeRex Inc.
发明人: Behbahani Farbod
摘要: Measurement of signal power for variable or time varying signals. A log-linear VGA coupled in a feedback configuration to a difference detector and an integrator, includes a set of amplifier cells selectable by a sliding current generator, producing a sum of outputs. Outputs of the sliding current generator include a first control current provided using a sum of amplified currents, a sequence of intermediate control currents, and a final control current provided using a sum of amplified currents. Control currents to be summed can be differentially amplified or attenuated; attenuators include capacitors to compensate for capacitive loading. Selectable amplifier cells are differentially amplified or attenuated. Isolating switches and canceling stages reduce the effects of leakage between adjacent amplifier cells. The sliding current generator can have boosted current to first and last amplifier cells, providing a more linear-in-dB gain near a relative maximum or minimum.
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公开(公告)号:US20220093581A1
公开(公告)日:2022-03-24
申请号:US17026939
申请日:2020-09-21
申请人: BeRex Inc.
IPC分类号: H01L25/18 , H01L23/00 , H01L23/495
摘要: A radio frequency transceiver integrated circuit front end chip and package with integrated harmonic filter is designed to present a 50 Ohm impedance to the integrated circuit. The harmonic filter is connected to the antenna with a bond wire inside the package. The device provides reduced size and cost associated with transceiver circuits that are fabricated in CMOS technology and applied as standalone devices.
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公开(公告)号:US20230132419A1
公开(公告)日:2023-05-04
申请号:US17518925
申请日:2021-11-04
申请人: BeRex Inc.
摘要: Radio frequency (RF) power amplifier architectures and circuits providing compensated current and gain from turn-on to end of long signal burst intervals to counteract amplifier transistor thermal rise due to self-heating at turn-on. The RF receiver circuit may be implemented as one of a single chip device or as part of an integrated system of components for use in mobile communication systems.
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