公开(公告)号：US20120218117A1

公开(公告)日：2012-08-30

申请号：US13469087

申请日：2012-05-11

Applicant: Bing-Min Lin ,  Chao-Chung Wu ,  Chin-Fu Ho

Inventor： Bing-Min Lin ,  Chao-Chung Wu ,  Chin-Fu Ho

IPC: G08B5/00

CPC classification number: G06F11/32

Abstract: A quantification indicating circuit includes an indicating lamp set, a converting circuit, and an indicating lamp control circuit. The indicating lamp set has a plurality of indicating lamps. The converting circuit has a plurality of predetermined threshold values which are compared with a numerical signal of a circuit board to generate a comparison result. The comparison result is converted to be outputs of a plurality of control bits. The indicating lamp control circuit is coupled between the indicating lamp set and the converting circuit and is used for controlling the number of the indicating lamps which are brightened according to the outputs of the control bits.

Abstract translation: 量化指示电路包括指示灯组，转换电路和指示灯控制电路。 指示灯组具有多个指示灯。 转换电路具有与电路板的数字信号进行比较以产生比较结果的多个预定阈值。 将比较结果转换为多个控制位的输出。 指示灯控制电路连接在指示灯组和转换电路之间，用于根据控制位的输出控制亮化的指示灯的数量。

公开(公告)号：US20090066268A1

公开(公告)日：2009-03-12

申请号：US12190598

申请日：2008-08-13

Applicant: Bing-Min Lin ,  Chao-Chung Wu ,  Chin-Fu Ho

Inventor： Bing-Min Lin ,  Chao-Chung Wu ,  Chin-Fu Ho

IPC: H05B37/02

CPC classification number: G06F11/32

Abstract: A quantification indicating circuit includes an indicating lamp set, a converting circuit, and an indicating lamp control circuit. The indicating lamp set has a plurality of indicating lamps. The converting circuit has a plurality of predetermined threshold values which are compared with a numerical signal of a circuit board to generate a comparison result. The comparison result is converted to be outputs of a plurality of control bits. The indicating lamp control circuit is coupled between the indicating lamp set and the converting circuit and is used for controlling the number of the indicating lamps which are brightened according to the outputs of the control bits.

Abstract translation: 量化指示电路包括指示灯组，转换电路和指示灯控制电路。 指示灯组具有多个指示灯。 转换电路具有与电路板的数字信号进行比较以产生比较结果的多个预定阈值。 将比较结果转换为多个控制位的输出。 指示灯控制电路连接在指示灯组和转换电路之间，用于根据控制位的输出控制亮化的指示灯的数量。

公开(公告)号：US08531309B2

公开(公告)日：2013-09-10

申请号：US13469087

申请日：2012-05-11

Applicant: Bing-Min Lin ,  Chao-Chung Wu ,  Chin-Fu Ho

Inventor： Bing-Min Lin ,  Chao-Chung Wu ,  Chin-Fu Ho

IPC: G08B5/00

CPC classification number: G06F11/32

Abstract: A quantification indicating circuit includes an indicating lamp set, a converting circuit, and an indicating lamp control circuit. The indicating lamp set has a plurality of indicating lamps. The converting circuit has a plurality of predetermined threshold values which are compared with a numerical signal of a circuit board to generate a comparison result. The comparison result is converted to be outputs of a plurality of control bits. The indicating lamp control circuit is coupled between the indicating lamp set and the converting circuit and is used for controlling the number of the indicating lamps which are brightened according to the outputs of the control bits.

Abstract translation: 量化指示电路包括指示灯组，转换电路和指示灯控制电路。 指示灯组具有多个指示灯。 转换电路具有与电路板的数字信号进行比较以产生比较结果的多个预定阈值。 将比较结果转换为多个控制位的输出。 指示灯控制电路连接在指示灯组和转换电路之间，用于根据控制位的输出控制亮化的指示灯的数量。

公开(公告)号：US08448011B2

公开(公告)日：2013-05-21

申请号：US12844498

申请日：2010-07-27

Applicant: Bing Min Lin ,  Chih Shien Lin ,  Chih Yung Peng

Inventor： Bing Min Lin ,  Chih Shien Lin ,  Chih Yung Peng

IPC: G06F1/08

CPC classification number: G06F1/324 ,  Y02D10/126

Abstract: A data processing system and an adjusting method thereof are disclosed. The data processing system includes a processor, a clock generator, a monitoring module and a determining module. When a target program is processed, the monitoring module monitors a first loading level of the processor, and transmits the first loading level to the determining module for recording. Furthermore, when a present program is processed, the monitoring module monitors a second loading level of the processor, and transmits the second loading level to the determining module. The determining module determines whether the second loading level matches with the first loading level within a preset period, and if it matches, the determining module generates and transmits a control signal to the clock generator, thereby making the clock generator generates a first clock signal to the processor, so as to increase the operating frequency of the processor.

Abstract translation: 公开了一种数据处理系统及其调整方法。 数据处理系统包括处理器，时钟发生器，监视模块和确定模块。 当处理目标程序时，监视模块监视处理器的第一加载级别，并将第一加载级别发送到确定模块进行记录。 此外，当处理当前节目时，监视模块监视处理器的第二负载水平，并将第二负载电平发送到确定模块。 确定模块确定第二加载电平是否在预设周期内与第一负载电平相匹配，并且如果匹配，则确定模块产生并发送控制信号到时钟发生器，从而使得时钟发生器产生第一时钟信号 处理器，从而增加处理器的工作频率。

公开(公告)号：US20090077410A1

公开(公告)日：2009-03-19

申请号：US12198075

申请日：2008-08-25

Applicant: Bing-Min Lin ,  Chin-Fu Ho ,  Yu-Sheng Wang ,  Yen-Ting Chou

Inventor： Bing-Min Lin ,  Chin-Fu Ho ,  Yu-Sheng Wang ,  Yen-Ting Chou

IPC: G06F1/08

CPC classification number: G06F1/08

Abstract: A method for setting an actual operation frequency of a memory is provided. The method includes the following steps. First, a memory model list is provided for selecting a memory model. Then, an estimation operation frequency of the memory is obtained according to the selected model. Finally, the operation frequency of a front side bus (FSB) is adjusted and cooperated with a frequency transformation ratio to generate the actual operation frequency of the memory according to the estimation operation frequency.

Abstract translation: 提供了一种用于设置存储器的实际操作频率的方法。 该方法包括以下步骤。 首先，提供用于选择存储器模型的存储器模型列表。 然后，根据所选择的模型获得存储器的估计操作频率。 最后，前端总线（FSB）的工作频率以频率变换比进行调整配合，根据推定运算频率生成存储器的实际工作频率。

公开(公告)号：US08199026B2

公开(公告)日：2012-06-12

申请号：US12190598

申请日：2008-08-13

Applicant: Bing-Min Lin ,  Chao-Chung Wu ,  Chin-Fu Ho

Inventor： Bing-Min Lin ,  Chao-Chung Wu ,  Chin-Fu Ho

IPC: G08B5/00

CPC classification number: G06F11/32

Abstract: A quantification indicating circuit includes an indicating lamp set, a converting circuit, and an indicating lamp control circuit. The indicating lamp set has a plurality of indicating lamps. The converting circuit has a plurality of predetermined threshold values which are compared with a numerical signal of a circuit board to generate a comparison result. The comparison result is converted to be outputs of a plurality of control bits. The indicating lamp control circuit is coupled between the indicating lamp set and the converting circuit and is used for controlling the number of the indicating lamps which are brightened according to the outputs of the control bits.

Abstract translation: 量化指示电路包括指示灯组，转换电路和指示灯控制电路。 指示灯组具有多个指示灯。 转换电路具有与电路板的数字信号进行比较以产生比较结果的多个预定阈值。 将比较结果转换为多个控制位的输出。 指示灯控制电路连接在指示灯组和转换电路之间，用于根据控制位的输出控制亮化的指示灯的数量。

公开(公告)号：US20110022874A1

公开(公告)日：2011-01-27

申请号：US12844498

申请日：2010-07-27

Applicant: Bing Min LIN ,  Chih Shien Lin ,  Chih Yung Peng

Inventor： Bing Min LIN ,  Chih Shien Lin ,  Chih Yung Peng

IPC: G06F1/08

CPC classification number: G06F1/324 ,  Y02D10/126

Abstract: A data processing system and an adjusting method thereof are disclosed. The data processing system includes a processor, a clock generator, a monitoring module and a determining module. When a target program is processed, the monitoring module monitors a first loading level of the processor, and transmits the first loading level to the determining module for recording. Furthermore, when a present program is processed, the monitoring module monitors a second loading level of the processor, and transmits the second loading level to the determining module. The determining module determines whether the second loading level matches with the first loading level within a preset period, and if it matches, the determining module generates and transmits a control signal to the clock generator, thereby making the clock generator generates a first clock signal to the processor, so as to increase the operating frequency of the processor.

Abstract translation: 公开了一种数据处理系统及其调整方法。 数据处理系统包括处理器，时钟发生器，监视模块和确定模块。 当处理目标程序时，监视模块监视处理器的第一加载级别，并将第一加载级别发送到确定模块进行记录。 此外，当处理当前节目时，监视模块监视处理器的第二负载水平，并将第二负载电平发送到确定模块。 确定模块确定第二加载电平是否在预设周期内与第一负载电平相匹配，并且如果匹配，则确定模块产生并发送控制信号到时钟发生器，从而使得时钟发生器产生第一时钟信号 处理器，从而增加处理器的工作频率。