Fast-carry arithmetic circuit using a multi-input look-up table
    2.
    发明授权
    Fast-carry arithmetic circuit using a multi-input look-up table 有权
    使用多输入查找表的快速运算算术电路

    公开(公告)号:US07685215B1

    公开(公告)日:2010-03-23

    申请号:US11257137

    申请日:2005-10-24

    IPC分类号: G06F7/38 G06F7/50

    CPC分类号: G06F7/508

    摘要: In one embodiment of the invention, programmable circuits, such as FPGAs, may be used to implement different types of functions, such as a multi-bit adder, using look-up table (LUT) circuits as their building blocks. Efficient generation of carry-out signals and fast-carry generation signals using available SRAM cells in the various embodiments of the LUT circuit can reduce and/or eliminate area-inefficient look-ahead carry logic without a significant delay in signal generation.

    摘要翻译: 在本发明的一个实施例中,诸如FPGA之类的可编程电路可以用于实现不同类型的功能,例如使用查找表(LUT)电路作为其构建块的多位加法器。 在LUT电路的各种实施例中,利用可用的SRAM单元有效地产生进位信号和快速携带产生信号可以减少和/或消除无效率的先行进位逻辑,而不会产生显着的信号延迟。