公开(公告)号：US06970814B1

公开(公告)日：2005-11-29

申请号：US09539020

申请日：2000-03-30

申请人： Carl L. Ashley ,  Charles N. Choukalos ,  Scott A. Tetreault

发明人： Carl L. Ashley ,  Charles N. Choukalos ,  Scott A. Tetreault

IPC分类号： G06F17/50 ,  G06F9/455 ,  G06F19/00 ,  G06Q50/00

CPC分类号： G06F17/5022 ,  G06F2217/66

摘要： A method and structure for simulating a circuit comprising inputting, from a customer site, initial memory states, and initial input signals to core logic within a host site, simulating the circuit utilizing the host site and the customer site connected though a wide area network (wherein the host site contains the core logic and the customer site contains customer logic, the core logic and the customer logic forming the circuit), comparing test output signals with the desired output signals, and altering the customer logic until the test output signals are consistent with the desired output signals.

摘要翻译： 一种用于模拟电路的方法和结构，包括从客户站点将初始存储器状态和初始输入信号输入到主机站内的核心逻辑，利用主站点和通过广域网连接的客户站点模拟电路（ 其中主机站点包含核心逻辑，客户站点包含客户逻辑，核心逻辑和形成电路的客户逻辑），将测试输出信号与期望的输出信号进行比较，并改变客户逻辑，直到测试输出信号一致 具有所需的输出信号。