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公开(公告)号:US06469258B1
公开(公告)日:2002-10-22
申请号:US09648946
申请日:2000-08-23
申请人: Choon Heung Lee , Won Dai Shin , Chang Hoon Ko , Won Sun Shin , Seon Goo Lee , Won Kyun Lee , Tae Hoan Jang , Jun Young Yang
发明人: Choon Heung Lee , Won Dai Shin , Chang Hoon Ko , Won Sun Shin , Seon Goo Lee , Won Kyun Lee , Tae Hoan Jang , Jun Young Yang
IPC分类号: H01R1204
CPC分类号: H05K1/0259 , H01L23/60 , H01L2924/0002 , H05K1/0215 , H05K3/0052 , H05K3/28 , H05K2201/09354 , H01L2924/00
摘要: A circuit board for semiconductor package is designed to provide a complete grounding with corresponding equipment in the manufacture of the semiconductor package based on a circuit board, thereby preventing a breakdown of the circuit board or semiconductor chip caused by electrostatic charges. The printed circuit board for semiconductor package includes: a resinous substrate; a chip mounting region formed on the top surface of the resinous substrate for mounting a semiconductor chip thereon; a plurality of fine circuit patterns radially disposed in the circumference of the chip mounting region and extending to the edge of the chip mounting region; a plurality of ball lands formed in an array on the bottom surface of the resinous substrate, to be fused to conductive balls; a conductive via hole connecting the circuit patterns on the top surface of the resinous substrate to the ball lands on the bottom surface of the resinous substrate; a cover coat applied to the top and bottom surfaces of the resinous substrate to protect the circuit patterns from an external environment and make the ball lands open to the exterior; and a means for removing electrostatic charges provided at the edge of the substrate and connected to the plural circuit patterns to remove electrostatic charges in the manufacture of semiconductors.
摘要翻译: 用于半导体封装的电路板被设计为在基于电路板的半导体封装的制造中提供与相应设备的完全接地,从而防止由静电电荷引起的电路板或半导体芯片的损坏。 用于半导体封装的印刷电路板包括:树脂基板; 芯片安装区,形成在树脂基板的顶表面上,用于在其上安装半导体芯片; 多个精细电路图案,其径向设置在芯片安装区域的周边并延伸到芯片安装区域的边缘; 在树脂基板的底面上以阵列形成的多个球状接头,与导电球熔合; 导电通孔,其将树脂基材的顶表面上的电路图案连接到树脂基材的底表面上的球接头; 涂覆在树脂基材的顶表面和底表面上的保护层,以保护电路图案免受外部环境的影响,并使球体向外露出; 以及用于去除设置在基板的边缘并连接到多个电路图案以在半导体制造中去除静电电荷的静电电荷的装置。