公开(公告)号：US08358261B2

公开(公告)日：2013-01-22

申请号：US12502004

申请日：2009-07-13

申请人： Jian-Xun Jiang ,  Chang Ming Chiu

发明人： Jian-Xun Jiang ,  Chang Ming Chiu

IPC分类号： G09G3/36

CPC分类号： G09G3/3611 ,  G09G2310/0289 ,  G09G2310/066 ,  G09G2310/08 ,  G09G2320/0223 ,  G09G2320/0247 ,  G09G2330/021

摘要： A liquid crystal display (LCD) device is provided. The LCD device includes a LCD panel, which further includes a plurality of scan lines, a gate driving circuit, a clock circuit. The clock circuit includes a clock generator and an adjusting circuit. The clock generator generates a clock signal having a first high voltage level and a first low voltage level. The adjusting circuit, coupled to the clock generator, receives the clock signal and generates an adjusted clock signal having the same period as the clock signal. The adjusted clock signal has a second high voltage level and a second low voltage level. The gate driving circuit, coupled to the clock circuit, receives the adjusted clock signal as a gate driving signal in order to drive the scan lines.

摘要翻译： 提供液晶显示（LCD）装置。 LCD装置包括LCD面板，其还包括多条扫描线，栅极驱动电路，时钟电路。 时钟电路包括时钟发生器和调整电路。 时钟发生器产生具有第一高电压电平和第一低电压电平的时钟信号。 耦合到时钟发生器的调节电路接收时钟信号并产生具有与时钟信号相同周期的经调整的时钟信号。 经调整的时钟信号具有第二高电压电平和第二低电压电平。 耦合到时钟电路的栅极驱动电路接收调整后的时钟信号作为栅极驱动信号，以驱动扫描线。

公开(公告)号：US20100013822A1

公开(公告)日：2010-01-21

申请号：US12502004

申请日：2009-07-13

申请人： Jian-Xun JIANG ,  Chang Ming CHIU

发明人： Jian-Xun JIANG ,  Chang Ming CHIU

IPC分类号： G09G5/00

CPC分类号： G09G3/3611 ,  G09G2310/0289 ,  G09G2310/066 ,  G09G2310/08 ,  G09G2320/0223 ,  G09G2320/0247 ,  G09G2330/021

摘要： A liquid crystal display (LCD) device is provided. The LCD device includes a LCD panel, which further includes a plurality of scan lines, a gate driving circuit, a clock circuit. The clock circuit includes a clock generator and an adjusting circuit. The clock generator generates a clock signal having a first high voltage level and a first low voltage level. The adjusting circuit, coupled to the clock generator, receives the clock signal and generates an adjusted clock signal having the same period as the clock signal. The adjusted clock signal has a second high voltage level and a second low voltage level. The gate driving circuit, coupled to the clock circuit, receives the adjusted clock signal as a gate driving signal in order to drive the scan lines.

摘要翻译： 提供液晶显示（LCD）装置。 LCD装置包括LCD面板，其还包括多条扫描线，栅极驱动电路，时钟电路。 时钟电路包括时钟发生器和调整电路。 时钟发生器产生具有第一高电压电平和第一低电压电平的时钟信号。 耦合到时钟发生器的调节电路接收时钟信号并产生具有与时钟信号相同周期的经调整的时钟信号。 经调整的时钟信号具有第二高电压电平和第二低电压电平。 耦合到时钟电路的栅极驱动电路接收调整后的时钟信号作为栅极驱动信号，以驱动扫描线。

公开(公告)号：US20070182686A1

公开(公告)日：2007-08-09

申请号：US11350451

申请日：2006-02-09

申请人： Jun-Chang Chen ,  Chang-Ming Chiu

发明人： Jun-Chang Chen ,  Chang-Ming Chiu

IPC分类号： G09G3/36

CPC分类号： G09G3/20 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0286 ,  G09G2330/04 ,  G11C19/00 ,  G11C19/28

摘要： Systems for displaying images are provided. In this regard, a representative system incorporates a signal driving circuit that includes a plurality of PMOS shift registers connected in series and controlled only by a first clock signal and a second clock signal, wherein the PMOS shift registers are operative to output corresponding driving pulses in turn after receiving a start pulse.

摘要翻译： 提供显示图像的系统。 在这方面，代表性系统包括信号驱动电路，该信号驱动电路包括串联连接并且仅由第一时钟信号和第二时钟信号控制的多个PMOS移位寄存器，其中PMOS移位寄存器用于输出相应的驱动脉冲 在接收到起始脉冲后转弯。

公开(公告)号：US20060152252A1

公开(公告)日：2006-07-13

申请号：US11098494

申请日：2005-04-05

申请人： Chang-Ming Chiu

发明人： Chang-Ming Chiu

IPC分类号： H03K5/01

CPC分类号： H03K5/088 ,  H03K5/003

摘要： A data slicer with a source-degeneration structure is described. In particular, this invention can be implemented in a FM demodulation system. It located at the end of the demodulator. The data slicer can slice a signal transmitted through air and demodulates the same with a demodulator to produce a frequency-shifted modulation (FSK) signal. The signal is a perfect square-wave and is transmitted to a base band circuit. The data slicer with a source-degeneration structure obtains the exact reference voltage. The reference voltage is not affected by noise and doesn't need the coupling capacitor, so it can reduce the difficulty of manufacture and cost. The present invention has a common-source unit with a source-degeneration resistor for producing an input signal and a reference voltage, and a comparator unit for comparing the input signal and the reference voltage and outputting a square-wave signal that corresponds to the input signal.

摘要翻译： 描述了具有源 - 退化结构的数据限幅器。 特别地，本发明可以在FM解调系统中实现。 它位于解调器的末端。 数据限幅器可以切片通过空中传输的信号，并用解调器对其进行解调，以产生频移调制（FSK）信号。 信号是一个完美的方波，并被传输到基带电路。 具有源极退化结构的数据限幅器获得精确的参考电压。 参考电压不受噪声影响，不需要耦合电容，因此可以降低制造难度和成本。 本发明具有用于产生输入信号和参考电压的源极退化电阻的共源单元，以及用于比较输入信号和参考电压的比较器单元，并输出对应于输入的方波信号 信号。

公开(公告)号：US07804475B2

公开(公告)日：2010-09-28

申请号：US11350451

申请日：2006-02-09

申请人： Jun-Chang Chen ,  Chang-Ming Chiu

发明人： Jun-Chang Chen ,  Chang-Ming Chiu

IPC分类号： G09G3/36 ,  G09G3/32

CPC分类号： G09G3/20 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0286 ,  G09G2330/04 ,  G11C19/00 ,  G11C19/28

摘要： Systems for displaying images are provided. In this regard, a representative system incorporates a signal driving circuit that includes a plurality of PMOS shift registers connected in series and controlled only by a first clock signal and a second clock signal, wherein the PMOS shift registers are operative to output corresponding driving pulses in turn after receiving a start pulse.

摘要翻译： 提供显示图像的系统。 在这方面，代表性系统包括信号驱动电路，该信号驱动电路包括串联连接并且仅由第一时钟信号和第二时钟信号控制的多个PMOS移位寄存器，其中PMOS移位寄存器用于输出相应的驱动脉冲 在接收到起始脉冲后转弯。

公开(公告)号：US07368956B2

公开(公告)日：2008-05-06

申请号：US11098494

申请日：2005-04-05

申请人： Chang-Ming Chiu

发明人： Chang-Ming Chiu

IPC分类号： H03K5/153

CPC分类号： H03K5/088 ,  H03K5/003

摘要： A data slicer with a source-degeneration structure is described. In particular, this invention can be implemented in a FM demodulation system. It located at the end of the demodulator. The data slicer can slice a signal transmitted through air and demodulates the same with a demodulator to produce a frequency-shifted modulation (FSK) signal. The signal is a perfect square-wave and is transmitted to a base band circuit. The data slicer with a source-degeneration structure obtains the exact reference voltage. The reference voltage is not affected by noise and doesn't need the coupling capacitor, so it can reduce the difficulty of manufacture and cost. The present invention has a common-source unit with a source-degeneration resistor for producing an input signal and a reference voltage, and a comparator unit for comparing the input signal and the reference voltage and outputting a square-wave signal that corresponds to the input signal.

摘要翻译： 描述了具有源 - 退化结构的数据限幅器。 特别地，本发明可以在FM解调系统中实现。 它位于解调器的末端。 数据限幅器可以切片通过空中传输的信号，并用解调器对其进行解调，以产生频移调制（FSK）信号。 信号是一个完美的方波，并被传输到基带电路。 具有源极退化结构的数据限幅器获得精确的参考电压。 参考电压不受噪声影响，不需要耦合电容，因此可以降低制造难度和成本。 本发明具有用于产生输入信号和参考电压的源极退化电阻的共源单元，以及用于比较输入信号和参考电压的比较器单元，并输出对应于输入的方波信号 信号。