Method and apparatus of performing an erase operation on a memory integrated circuit
    1.
    发明授权
    Method and apparatus of performing an erase operation on a memory integrated circuit 有权
    在存储器集成电路上执行擦除操作的方法和装置

    公开(公告)号:US08508993B2

    公开(公告)日:2013-08-13

    申请号:US13567817

    申请日:2012-08-06

    IPC分类号: G11C11/34

    摘要: Various discussed approaches improve the over erase issue and the coupling effect, and include (A) multilevel contacts between (i) the first outer selected word line of an erase group, and (ii) the first unselected word line outside the ease group neighboring the first outer selected word line; (B) a sufficient separation distance between (i) the first outer selected word line of an erase group, and (ii) the first unselected word line outside the ease group neighboring the first outer selected word line. These are examples of electrically isolating (i) the first outer selected word line of an erase group, from (ii) the first unselected word line outside the ease group neighboring the first outer selected word line.

    摘要翻译: 各种讨论的方法改进了过度擦除问题和耦合效应,并且包括(A)(i)擦除组的第一外部选定字线之间的多电平接触,以及(ii)与易失性组相邻的第一未选择字线 第一外选字线; (B)在(i)擦除组的第一外部选择字线之间的足够的间隔距离,和(ii)与第一外部选择字线相邻的容易组之外的第一未选择字线。 这些是将(i)擦除组的第一外部选择的字线从(ii)与第一外部选择字线相邻的易用组之外的第一未选择字线电隔离的示例。