公开(公告)号：US06207482B1

公开(公告)日：2001-03-27

申请号：US09346528

申请日：1999-07-02

Applicant: Jiaw-Ren Shih ,  Shui-Hung Chen ,  Jian-Hsing Lee ,  Chia-Hung Tunga

Inventor： Jiaw-Ren Shih ,  Shui-Hung Chen ,  Jian-Hsing Lee ,  Chia-Hung Tunga

IPC: H01L218238

CPC classification number: H01L29/66537 ,  H01L21/26586 ,  H01L21/823807 ,  H01L21/823842

Abstract: The invention provides a gate pocket implantation and post-processing sequence that allows for the creation of a deep and narrow pocket implant without affecting gate threshold voltage and the integrity of the gate oxide layer.

Abstract translation: 本发明提供了一种门口注入和后处理顺序，其允许创建深而窄的口袋注入而不影响栅极阈值电压和栅极氧化物层的完整性。