公开(公告)号：US20120264063A1

公开(公告)日：2012-10-18

申请号：US13086935

申请日：2011-04-14

Applicant: Chih-Jen Yu ,  Chun-Hung Lin ,  Juin-Hung Lin ,  Hsueh-Yi Chung ,  Li-Kong Turn ,  Keh-Wen Chang

Inventor： Chih-Jen Yu ,  Chun-Hung Lin ,  Juin-Hung Lin ,  Hsueh-Yi Chung ,  Li-Kong Turn ,  Keh-Wen Chang

IPC: G03F7/20 ,  G06F17/50

CPC classification number: G06F17/50 ,  G03F7/705 ,  G03F7/70558 ,  G03F7/70625

Abstract: A method including providing a present wafer to be processed by a photolithography tool, selecting a processed wafer having a past chip design from a plurality of processed wafers, the processed wafer being previously processed by the photolithography tool, selecting a plurality of critical dimension (CD) data points extracted from a plurality of fields on the processed wafer, modeling the plurality of CD data points with a function relating CD to position on the processed wafer, creating a field layout on the present wafer for a new chip design, creating an initial exposure dose map for the new chip design using the function and the field layout, and controlling the exposure of the photolithography tool according to the initial exposure dose map to form the new chip design on the present wafer.

Abstract translation: 一种方法，包括提供将由光刻工具处理的当前晶片，从多个经处理的晶片中选择具有过去芯片设计的处理晶片，处理的晶片由光刻工具预先处理，选择多个临界尺寸（CD ）数据点，其处理晶片上的多个场中提取的数据点，以与CD相关的功能对处理的晶片上的位置对多个CD数据点进行建模，在当前晶片上创建用于新芯片设计的场布局， 使用功能和现场布局的新芯片设计的曝光剂量图，并根据初始曝光剂量图控制光刻工具的曝光，以在当前晶片上形成新的芯片设计。

公开(公告)号：US08429569B2

公开(公告)日：2013-04-23

申请号：US13086935

申请日：2011-04-14

Applicant: Chih-Jen Yu ,  Chun-Hung Lin ,  Juin-Hung Lin ,  Hsueh-Yi Chung ,  Li-Kong Turn ,  Keh-Wen Chang

Inventor： Chih-Jen Yu ,  Chun-Hung Lin ,  Juin-Hung Lin ,  Hsueh-Yi Chung ,  Li-Kong Turn ,  Keh-Wen Chang

IPC: G06F17/50

CPC classification number: G06F17/50 ,  G03F7/705 ,  G03F7/70558 ,  G03F7/70625

Abstract: A method including providing a present wafer to be processed by a photolithography tool, selecting a processed wafer having a past chip design from a plurality of processed wafers, the processed wafer being previously processed by the photolithography tool, selecting a plurality of critical dimension (CD) data points extracted from a plurality of fields on the processed wafer, modeling the plurality of CD data points with a function relating CD to position on the processed wafer, creating a field layout on the present wafer for a new chip design, creating an initial exposure dose map for the new chip design using the function and the field layout, and controlling the exposure of the photolithography tool according to the initial exposure dose map to form the new chip design on the present wafer.

Abstract translation: 一种方法，包括提供由光刻工具处理的当前晶片，从多个处理的晶片中选择具有过去晶片设计的经处理的晶片，处理的晶片由光刻工具预先处理，选择多个关键尺寸（CD ）数据点，其处理晶片上的多个场中提取的数据点，以与CD相关的功能对处理的晶片上的位置对多个CD数据点进行建模，在当前晶片上创建用于新芯片设计的场布局， 使用功能和现场布局的新芯片设计的曝光剂量图，并根据初始曝光剂量图控制光刻工具的曝光，以在当前晶片上形成新的芯片设计。