公开(公告)号：US20120054393A1

公开(公告)日：2012-03-01

申请号：US13180633

申请日：2011-07-12

申请人： Chihiro YOSHIMURA

发明人： Chihiro YOSHIMURA

IPC分类号： G06F13/00

CPC分类号： G06F13/387

摘要： To make it possible for multiple blades to share an SR-IOV device in the form that enables a hypervisor to acquire necessary information and to make a setting between itself and a PF. A computer system has multiple servers, an I/O device, an I/O switch for connecting these servers and the I/O device, and an I/O controller for managing the I/O switch, wherein the I/O device has one or more PF's, the I/O controller has a master PF driver for accessing the PF of the I/O device, the servers have respective slave PF drivers, these slave PF drivers transfer their requests to the master PF driver in order to use the PF of the I/O device, and the master PF driver accesses the PF of the I/O device as a proxy of the slave PF driver.

摘要翻译： 为了使多个刀片可以以使管理程序能够获取必要信息并在其自身与PF之间进行设置的形式共享SR-IOV设备成为可能。 计算机系统具有多个服务器，I / O设备，用于连接这些服务器的I / O开关和I / O设备以及用于管理I / O开关的I / O控制器，其中I / O设备具有 一个或多个PF，I / O控制器具有用于访问I / O设备的PF的主PF驱动程序，服务器具有相应的从PF驱动程序，这些从属PF驱动程序将其请求传送到主PF驱动程序，以便使用 I / O设备的PF和主PF驱动程序作为从PF驱动程序的代理访问I / O设备的PF。

公开(公告)号：US20100064070A1

公开(公告)日：2010-03-11

申请号：US12546386

申请日：2009-08-24

申请人： Chihiro Yoshimura ,  Yoshiko Nagasaka ,  Naonobu Sukegawa ,  Koichi Takayama

发明人： Chihiro Yoshimura ,  Yoshiko Nagasaka ,  Naonobu Sukegawa ,  Koichi Takayama

IPC分类号： G06F13/28

CPC分类号： G06F13/128

摘要： In order to improve throughput by suppressing contention of hardware resources in a computer to which a data transfer unit is coupled, a control unit for transferring data between a first interface coupled to the computer and a second interface coupled to a memory transaction issuing unit for issuing, when one of the first interface and the second interface receives an access request to a memory of the computer, a memory transaction for the main memory to the first interface, the first interface includes a plurality of interfaces coupled in parallel to the computer, and the control unit further includes a memory transaction distribution unit for extracting an address of the main memory, which is contained in the memory transaction issued by the memory transaction issuing unit, and selecting an interface having address designation information set therein, which corresponds to the extracted address to transmit the memory transaction.

摘要翻译： 为了通过抑制耦合数据传送单元的计算机中的硬件资源的争用来提高吞吐量，用于在耦合到计算机的第一接口和耦合到存储器事务发布单元的第二接口之间传送数据的控制单元，用于发布 当所述第一接口和所述第二接口之一接收到所述计算机的存储器的访问请求时，将所述主存储器的存储器事务存储到所述第一接口，所述第一接口包括并行耦合到所述计算机的多个接口，以及 控制单元还包括存储器交易分配单元，用于提取包含在由存储器交易发行单元发出的存储器交易中的主存储器的地址，并且选择其中设置的地址指定信息的接口，该接口对应于所提取的 地址传输内存事务。