公开(公告)号：US20090283600A1

公开(公告)日：2009-11-19

申请号：US12285187

申请日：2008-09-30

Applicant: Wen-Lin Chang ,  Satoshi Sugawa ,  Chuang Cheng ,  Ching-Hu Chen

Inventor： Wen-Lin Chang ,  Satoshi Sugawa ,  Chuang Cheng ,  Ching-Hu Chen

IPC: G06K7/06

CPC classification number: G06F13/385 ,  G06F13/4072

Abstract: A card reader includes a card interface, and one of the pins of the card interface is selected to decide the state of the card interface. The card reader further includes a control circuit to detect the logic state of the selected pin. If the logic state is a first one, the control circuit decides the card interface is enabled; otherwise, if the logic state is a second one, the control circuit decides the card interface is disabled. In some embodiments, a switch is connected between the selected pin and a power supply or a ground terminal, to be switched by a control signal to enable or disable the card interface.

Abstract translation: 读卡器包括卡接口，并且选择卡接口的一个引脚来决定卡接口的状态。 读卡器还包括用于检测所选引脚的逻辑状态的控制电路。 如果逻辑状态是第一个，控制电路决定卡接口被使能; 否则，如果逻辑状态是第二个逻辑状态，则控制电路决定卡接口被禁用。 在一些实施例中，开关连接在所选择的引脚和电源或接地端子之间，以通过控制信号切换以启用或禁用卡接口。

公开(公告)号：US20080183948A1

公开(公告)日：2008-07-31

申请号：US11669171

申请日：2007-01-31

Applicant: Satoshi Sugawa ,  Ching-Hu Chen ,  Wen-Lin Cheng ,  Kai-Hsun Lin ,  Fuja Shone

Inventor： Satoshi Sugawa ,  Ching-Hu Chen ,  Wen-Lin Cheng ,  Kai-Hsun Lin ,  Fuja Shone

IPC: G06F1/10 ,  G06F12/02

CPC classification number: G06F13/4243

Abstract: A flash memory system is disclosed. The flash memory system includes a host and a flash memory card. The data transmission between the host and the flash memory card can be achieved with a clock signal for synchronization. The data is transmitted between the host and the flash memory card both at the falling edges and the rising edges of the clock signal.

Abstract translation: 公开了一种闪存系统。 闪存系统包括主机和闪存卡。 主机和闪存卡之间的数据传输可以用同步的时钟信号来实现。 在时钟信号的下降沿和上升沿，数据在主机和闪存卡之间传输。