Power semiconductor device and method of manufacturing the same
    1.
    发明申请
    Power semiconductor device and method of manufacturing the same 有权
    功率半导体器件及其制造方法

    公开(公告)号:US20100148254A1

    公开(公告)日:2010-06-17

    申请号:US12572240

    申请日:2009-10-01

    申请人: Cho Eung Park

    发明人: Cho Eung Park

    IPC分类号: H01L27/088 H01L21/8234

    摘要: A semiconductor device and a method of manufacturing the same. The method includes preparing a semiconductor substrate having high-voltage and low-voltage device regions, forming a field insulating layer in the high-voltage device region, forming a first gate oxide layer on the semiconductor substrate, exposing the semiconductor substrate in the low-voltage device region by etching part of the first gate oxide layer and also etching part of the field insulating layer to form a stepped field insulating layer, forming a second gate oxide layer on the first gate oxide layer in the high-voltage device region and on the exposed semiconductor substrate in the low-voltage device region, and forming a gate over the stepped field insulating layer and part of the second gate oxide layer in the high-voltage device region adjoining the field insulating layer.

    摘要翻译: 一种半导体器件及其制造方法。 该方法包括制备具有高电压和低电压器件区域的半导体衬底,在高电压器件区域中形成场绝缘层,在半导体衬底上形成第一栅极氧化物层, 通过蚀刻第一栅极氧化物层的一部分并且还蚀刻场绝缘层的一部分以形成阶梯形场绝缘层,在高电压器件区域中的第一栅极氧化物层上形成第二栅极氧化物层,并且在 在低电压器件区域中暴露的半导体衬底,并且在与栅极绝缘层相邻的高电压器件区域中的阶梯型场绝缘层和第二栅极氧化物层的一部分上形成栅极。

    Power semiconductor device and method of manufacturing the same
    2.
    发明授权
    Power semiconductor device and method of manufacturing the same 有权
    功率半导体器件及其制造方法

    公开(公告)号:US08067293B2

    公开(公告)日:2011-11-29

    申请号:US12572240

    申请日:2009-10-01

    申请人: Cho Eung Park

    发明人: Cho Eung Park

    IPC分类号: H01L29/72

    摘要: A semiconductor device and a method of manufacturing the same. The method includes preparing a semiconductor substrate having high-voltage and low-voltage device regions, forming a field insulating layer in the high-voltage device region, forming a first gate oxide layer on the semiconductor substrate, exposing the semiconductor substrate in the low-voltage device region by etching part of the first gate oxide layer and also etching part of the field insulating layer to form a stepped field insulating layer, forming a second gate oxide layer on the first gate oxide layer in the high-voltage device region and on the exposed semiconductor substrate in the low-voltage device region, and forming a gate over the stepped field insulating layer and part of the second gate oxide layer in the high-voltage device region adjoining the field insulating layer.

    摘要翻译: 一种半导体器件及其制造方法。 该方法包括制备具有高电压和低电压器件区域的半导体衬底,在高电压器件区域中形成场绝缘层,在半导体衬底上形成第一栅氧化层, 通过蚀刻第一栅极氧化物层的一部分并且还蚀刻场绝缘层的一部分以形成阶梯形场绝缘层,在高电压器件区域中的第一栅极氧化物层上形成第二栅极氧化物层,并且在 在低电压器件区域中暴露的半导体衬底,并且在与栅极绝缘层相邻的高电压器件区域中的阶梯型场绝缘层和第二栅极氧化物层的一部分上形成栅极。