Multi-ported memory architecture using single-ported RAM
    1.
    发明授权
    Multi-ported memory architecture using single-ported RAM 失效
    使用单端口RAM的多端口存储器架构

    公开(公告)号:US06212607B1

    公开(公告)日:2001-04-03

    申请号:US08783923

    申请日:1997-01-17

    IPC分类号: G06F1200

    CPC分类号: G11C7/1075 G11C2207/104

    摘要: A memory device (201) having left (203) and right (204) ports for communicating with left (205) and right (206) electronic devices, includes memory banks (401-0˜401-7), semaphore logic (302), and port coupling circuitry (403, 404, 405-0˜405-7, 406-0˜406-7, 407-0˜407-7). The semaphore logic generates bank access grant signals (313, 314) on a first received basis in response to bank access requests from the left and right electronic devices, and the port coupling circuitry couples selected memory banks to the left and right ports in response to the bank access grant signals. Also included in the memory device are mail-box registers (2500-0L˜2500-3L, 2500-0R˜2500-3R), interrupt generating circuitry (2514-0L˜2514-3L, 2514-0R˜2514-3R, 2900, 3000, 307, 308), and interrupt status and cause registers (3101L˜3102L, 3101R˜3102R, 3301L˜3302L, 3301R˜3302R). The left and right electronic devices use the mail-box registers to send messages to each other without waiting. The interrupt generating circuitry generates interrupts to notify the left and right electronic devices when their bank access requests have been granted, and when a message has been written into one of the mail-box registers for them. The interrupt status and cause registers provide information as to which memory banks the left and right electronic devices have been granted access to, and which mail-box registers contain messages for them.

    摘要翻译: 具有用于与左(205)和右(206)电子设备通信的左(203)和右(204)端口的存储设备(201)包括存储体(401-0〜401-7),信号量逻辑(302) ,和端口耦合电路(403,404,405-0〜405-7,406-0〜406-7,407-0〜407-7)。 信号量逻辑响应于来自左和右电子设备的存储体访问请求而在第一接收的基础上产生存储体存取授权信号(313,314),并且端口耦合电路响应于所选择的存储体耦合到左端口和右端口 银行存取授权信号。 内存中还包括邮箱寄存器(2500-0L〜2500-3L,2500-0R〜2500-3R),中断发生电路(2514-0L〜2514-3L,2514-0R〜2514-3R,2900 ,3000,307,308),以及中断状态和原因寄存器(3101L〜3102L,3101R〜3102R,3301L〜3302L,3301R〜3302R)。 左右电子设备使用邮箱寄存器相互发送消息,无需等待。 中断产生电路产生中断以在其银行访问请求被授予时通知左和右电子设备,并且当消息已被写入其中一个邮箱寄存器时。 中断状态和原因寄存器提供关于左和右电子设备被授权访问哪些存储器的信息,哪些邮箱寄存器包含用于它们的消息。