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公开(公告)号:US06976126B2
公开(公告)日:2005-12-13
申请号:US10384771
申请日:2003-03-11
CPC分类号: G06F12/0864 , Y02D10/13
摘要: The present invention provides an apparatus and method for accessing data values in a cache and in particular accessing data values in an ‘n’ way set associative cache. A data processing apparatus is provided comprising an ‘n’ way set-associative cache, each cache way having a plurality of entries for storing a corresponding plurality of data values. A cache controller is provided which is operable on receipt of an access request for a data value to determine whether that data value is accessible within the cache, the cache comprising cache access logic operable under the control of the cache controller to determine whether a data value the subject of an access request is accessible in one of the cache ways. Also provided is a way lookup cache arranged to store an indication of the cache way in which a number of the plurality of data values stored in the cache are accessible. The cache controller is operable, when an access request for a data value specifies a non-sequential access, to reference the way lookup cache to determine whether that data value is identified in the way lookup cache and, if so, the cache controller being further operable to suppress the operation of the cache access logic and to cause that data value to be accessed. The provision of a way lookup cache enables the power consumption of the cache to be reduced by enabling the operation of the cache access logic to be suppressed.
摘要翻译: 本发明提供一种用于访问高速缓存中的数据值的装置和方法,特别是以“n”方式组合关联高速缓存访问数据值。 提供了一种数据处理装置,其包括“n”路组合关联高速缓存,每个高速缓存路径具有用于存储对应的多个数据值的多个条目。 提供了一种高速缓存控制器,其可在接收到数据值的访问请求时操作以确定该高速缓存中是否可访问该数据值,该高速缓存包括在高速缓存控制器的控制下可操作的高速缓存访问逻辑,以确定数据值 访问请求的主题可以以缓存方式之一访问。 还提供了一种方式查找缓存器,其被布置为存储其中存储在高速缓存中的多个数据值的数量可访问的高速缓存方式的指示。 当对数据值的访问请求指定非顺序访问时,高速缓存控制器可操作地参考查找缓存的方式来确定该查找高速缓存是否识别该数据值,并且如果是,则高速缓存控制器进一步 可操作地抑制高速缓存访问逻辑的操作并使得该数据值被访问。 提供方式查找高速缓存使得能够抑制高速缓存访问逻辑的操作来降低高速缓存的功耗。