公开(公告)号：US06914908B1

公开(公告)日：2005-07-05

申请号：US09420129

申请日：1999-10-19

申请人： Michel Harrand ,  Claire Henry

发明人： Michel Henry

IPC分类号： G06F15/16 ,  G06F13/12 ,  G06F13/16 ,  G06F15/177 ,  G06T1/20 ,  H04N7/26 ,  H04J3/02

CPC分类号： G06F13/1605 ,  G06F13/126

摘要： The invention relates to a multitask processing system including a data bus and a command bus. Each one of a plurality of operators is provided to perform a processing determined by an instruction and is likely to issue a command request in order to receive an instruction from the command bus and to issue a transfer request on response to an acknowledgment of the command request, in order to receive or provide data being processed, through the data bus. A memory controller arbitrates the transfer requests and manages the data transfers on the data bus between the operators and a memory. A sequencer arbitrates the command requests, determines instructions to provide the operators with, and manages the instruction transfer through the command bus.

摘要翻译： 本发明涉及包括数据总线和命令总线的多任务处理系统。 提供多个运算符中的每一个以执行由指令确定的处理，并且可能发出命令请求以便从命令总线接收指令并且响应于命令请求的确认发出转移请求 ，以便通过数据总线接收或提供正在处理的数据。 存储器控制器仲裁传送请求并管理数据总线上的操作员和存储器之间的数据传输。 定序器仲裁命令请求，确定提供操作者的指令，并通过命令总线管理指令传输。