公开(公告)号：US5043295A

公开(公告)日：1991-08-27

申请号：US368825

申请日：1989-06-20

申请人： Paul A. Ruggerio ,  Cynthia E. Anderson

发明人： Paul A. Ruggerio ,  Cynthia E. Anderson

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L23/532

CPC分类号： H01L28/24 ,  H01L23/53223 ,  H01L2924/0002 ,  Y10S148/136

摘要： Process of making an IC chip with thin film resistors, and IC chips made by such process, wherein a chip substrate first is covered with layers of thin film and interconnect material (with an intermediate barrier layer if needed), such layers being etched away in predetermined regions in accordance with the metal interconnect pattern, the remaining layered material being aligned vertically, and thereafter, in a section of the remaining material, etching away the interconnect material (and barrier material if used) to expose the thin film material to form a thin film resistor which is self-aligned withe the adjoining sections of interconnect conductors. The material in the predetermined regions may be etched by a dry-etch (plasma) or by a wet-etch.

摘要翻译： 制造具有薄膜电阻器的IC芯片和通过这种工艺制造的IC芯片的工艺，其中芯片基板首先被薄膜和互连材料层（如果需要具有中间阻挡层）覆盖，这样的层被蚀刻掉 根据金属互连图案的预定区域，剩余的层状材料垂直对准，然后在剩余材料的一部分中蚀刻互连材料（和阻挡材料（如果使用的话））以暴露薄膜材料以形成 薄膜电阻器与互连导体的相邻部分自对准。 预定区域中的材料可以通过干蚀刻（等离子体）或湿式蚀刻来蚀刻。

公开(公告)号：US4878770A

公开(公告)日：1989-11-07

申请号：US94513

申请日：1987-09-09

申请人： Paul A. Ruggierio ,  Cynthia E. Anderson

发明人： Paul A. Ruggierio ,  Cynthia E. Anderson

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L23/532

CPC分类号： H01L28/24 ,  H01L23/53223 ,  H01L2924/0002 ,  Y10S148/136

摘要： Process of making an IC chip with thin film resistors, and IC chips made by such process, wherein a chip substrate first is covered with layers of thin film and interconnect material (with an intermediate barrier layer if needed), such layers being etched away in predetermined regions in accordance with the metal interconnect pattern, the remaining layered material being aligned vertically, and thereafter, in a section of the remaining material, etching away the interconnect material (and barrier material if used) to expose the thin film material to form a thin film resistor which is self-aligned with the adjoining sections of interconnect conductors. The material in the predetermined regions may be etched by a dry-etch (plasma) or by a wet-etch.

摘要翻译： 制造具有薄膜电阻器的IC芯片和通过这种工艺制造的IC芯片的工艺，其中芯片基板首先被薄膜和互连材料层（如果需要具有中间阻挡层）覆盖，这样的层被蚀刻掉 根据金属互连图案的预定区域，剩余的层状材料垂直对准，然后在剩余材料的一部分中，蚀刻掉互连材料（和阻挡材料（如果使用的话））以暴露薄膜材料以形成 薄膜电阻器与互连导体的相邻部分自对准。 预定区域中的材料可以通过干蚀刻（等离子体）或湿式蚀刻来蚀刻。