Photovoltaic Module Assembly And Method Of Assembling The Same
    1.
    发明申请
    Photovoltaic Module Assembly And Method Of Assembling The Same 审中-公开
    光伏组件及组装方法

    公开(公告)号:US20140196767A1

    公开(公告)日:2014-07-17

    申请号:US14123374

    申请日:2012-06-01

    IPC分类号: H01L31/042

    摘要: A photovoltaic module assembly is mounted on a frame of a racking system of a photovoltaic module installation site. The photovoltaic module assembly includes at least one photovoltaic module and at least one rash. The photovoltaic module includes a back sheet, at least one crystalline silicon photovoltaic cell supported on the back sheet, a first encapsulant layer formed from a silicone composition supported on the photovoltaic cell, and a cover sheet supported on the first encapsulant layer. The rail is fixed relative to the back sheet and is configured to support the one photovoltaic module on the racking system. Adhesive adheres the back sheet of the photovoltaic module to the rail. The adhesive is formed from a room-temperature vulcanizing silicone composition and has a thickness from the rail to the back sheet of between 2.3 mm and 6.0 mm.

    摘要翻译: 光伏模块组件安装在光伏模块安装地点的货架系统的框架上。 光伏模块组件包括至少一个光伏模块和至少一个皮疹。 光伏模块包括背板,支撑在背板上的至少一个晶体硅光伏电池,由支撑在光伏电池上的硅氧烷组合物形成的第一密封剂层和支撑在第一密封剂层上的覆盖片。 轨道相对于背板固定,并且被配置为支撑在货架系统上的一个光伏组件。 粘合剂将光伏模块的背板粘贴到导轨上。 粘合剂由室温硫化硅氧烷组合物形成,并且具有2.3mm至6.0mm之间的从轨到底片的厚度。

    Storage area network mapping
    4.
    发明授权
    Storage area network mapping 有权
    存储区域网络映射

    公开(公告)号:US08019840B2

    公开(公告)日:2011-09-13

    申请号:US10284966

    申请日:2002-10-31

    IPC分类号: G06F15/173 G06F15/16

    摘要: A computerized method for determining whether a storage device detected in a SAN is associated with a storage array detected in the SAN, where the storage array has one or more storage devices associated therewith. The computerized method includes obtaining identifying information for the detected storage device, obtaining identifying information for the one or more storage devices associated with the detected storage array, and processing the obtained information to determine whether the detected storage device is one of the one or more storage devices associated with the detected storage array.

    摘要翻译: 用于确定在SAN中检测到的存储设备是否与SAN中检测到的存储阵列相关联的计算机化方法,其中存储阵列具有与其相关联的一个或多个存储设备。 计算机化方法包括:获得检测到的存储设备的识别信息,获得与检测到的存储阵列相关联的一个或多个存储设备的识别信息,以及处理所获得的信息,以确定检测到的存储设备是否是一个或多个存储器 与检测到的存储阵列相关联的设备。

    System and method for identification of devices associated with input/output paths
    5.
    发明授权
    System and method for identification of devices associated with input/output paths 有权
    用于识别与输入/输出路径相关的设备的系统和方法

    公开(公告)号:US07216184B2

    公开(公告)日:2007-05-08

    申请号:US09846645

    申请日:2001-05-01

    IPC分类号: G06F3/00 G06F13/00

    摘要: The present invention is directed to a system and method which discovers or identifies a type of device associated with an input/output (I/O path). Preferred embodiments define a type of device by a property file. The property file is utilized to identify executable code that determines whether the device associated with a particular I/O path is the type of device defined by said property file.

    摘要翻译: 本发明涉及一种发现或识别与输入/输出(I / O路径)相关联的设备类型的系统和方法。 优选实施例通过属性文件定义设备的类型。 属性文件用于识别可执行代码,其确定与特定I / O路径相关联的设备是否是由所述属性文件定义的设备的类型。

    System and method for circuit symbolic timing analysis of circuit designs
    7.
    发明授权
    System and method for circuit symbolic timing analysis of circuit designs 失效
    电路设计电路符号定时分析系统及方法

    公开(公告)号:US08050904B2

    公开(公告)日:2011-11-01

    申请号:US11532268

    申请日:2006-09-15

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5031

    摘要: A method, data processing system, and computer program product are provided for performing time-based symbolic simulation. A delay-aware representation of a circuit is created that includes a plurality of circuit nodes. The data-aware representation is simulated. In particular, the simulator simulates transitions from a first set of circuit nodes to a second set of circuit nodes selected from the plurality of circuit nodes, the simulating based on executing a first set of simulation events. A second set of simulation events is then generated in response to executing the first set of simulation events. During the simulation, a time is computed for each of the transitions. An an event scheduling diagram is constructed during simulation. The event scheduling diagram depicts the transitions and the times of the transitions.

    摘要翻译: 提供了一种方法,数据处理系统和计算机程序产品,用于执行基于时间的符号仿真。 创建包括多个电路节点的电路的延迟感知表示。 模拟数据感知表示。 特别地,仿真器模拟从第一组电路节点到从多个电路节点选择的第二组电路节点的转换,基于执行第一组仿真事件进行仿真。 响应于执行第一组模拟事件而产生第二组模拟事件。 在仿真期间,为每个转换计算一个时间。 在仿真期间构建事件调度图。 事件调度图描述了转换和转换的时间。

    System and Method for Circuit Symbolic Timing Analysis of Circuit Designs
    9.
    发明申请
    System and Method for Circuit Symbolic Timing Analysis of Circuit Designs 失效
    电路设计电路符号定时分析系统与方法

    公开(公告)号:US20080071515A1

    公开(公告)日:2008-03-20

    申请号:US11532268

    申请日:2006-09-15

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5031

    摘要: A method, data processing system, and computer program product are provided for performing time-based symbolic simulation. A delay-aware representation of a circuit is created that includes a plurality of circuit nodes. The data-aware representation is simulated. In particular, the simulator simulates transitions from a first set of circuit nodes to a second set of circuit nodes selected from the plurality of circuit nodes, the simulating based on executing a first set of simulation events. A second set of simulation events is then generated in response to executing the first set of simulation events. During the simulation, a time is computed for each of the transitions. An an event scheduling diagram is constructed during simulation. The event scheduling diagram depicts the transitions and the times of the transitions.

    摘要翻译: 提供了一种方法,数据处理系统和计算机程序产品,用于执行基于时间的符号仿真。 创建包括多个电路节点的电路的延迟感知表示。 模拟数据感知表示。 特别地,仿真器模拟从第一组电路节点到从多个电路节点选择的第二组电路节点的转换,基于执行第一组仿真事件进行仿真。 响应于执行第一组模拟事件而产生第二组模拟事件。 在仿真期间,为每个转换计算一个时间。 在仿真期间构建事件调度图。 事件调度图描述了转换和转换的时间。

    Method for deriving a functional circuit description
    10.
    发明授权
    Method for deriving a functional circuit description 失效
    导出功能电路描述的方法

    公开(公告)号:US06711722B1

    公开(公告)日:2004-03-23

    申请号:US09642921

    申请日:2000-08-21

    IPC分类号: G06F1750

    CPC分类号: G06F17/5022

    摘要: A method for deriving a functional circuit description that is independent of pre-charge node values, the functional circuit description IS a transformation of an initial structural circuit description having pre-chargeable nodes. The method includes identifying the pre-chargeable nodes in initial structural circuit description. The pre-chargeable nodes have a logic value that is dependent upon an associated pre-charge clock. Pre-charge nodes value associated with the pre-chargeable nodes are then determined and then the functional circuit description that is independent of pre-charge node values is derived.

    摘要翻译: 用于导出与预充电节点值无关的功能电路描述的方法,功能电路描述是具有可预充电节点的初始结构电路描述的变换。 该方法包括在初始结构电路描述中识别可预充电节点。 预充电节点具有取决于相关的预充电时钟的逻辑值。 然后确定与预充电节点相关联的预充电节点值,然后导出与预充电节点值无关的功能电路描述。