公开(公告)号：US20150294977A1

公开(公告)日：2015-10-15

申请号：US14565012

申请日：2014-12-09

申请人： SANG-LOK KIM ,  YOUNGJIN JEON ,  DEVRAJ RAJAGOPAL ,  DONG-SU JANG ,  YONGHO CHO

发明人： SANG-LOK KIM ,  YOUNGJIN JEON ,  DEVRAJ RAJAGOPAL ,  DONG-SU JANG ,  YONGHO CHO

IPC分类号： H01L27/115

CPC分类号： H01L27/11573 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/11582

摘要： A nonvolatile memory device includes a memory cell array including a plurality of cell strings each having a plurality of memory cells stacked in a direction perpendicular to a substrate, and a peripheral circuit region including a plurality of transistors electrically connected to the memory cell array through a plurality of conductive lines. Each of the transistors includes a gate electrode crossing an active region of the substrate in a first direction and source and drain regions in the active region at the opposite sides of the gate electrode. In at least one of the transistors, the number of source contact plugs connected to the source region is different from the number of drain contact plugs connected to the drain region.

摘要翻译： 非易失性存储器件包括存储单元阵列，该存储单元阵列包括多个单元串，每个单元串具有沿垂直于基板的方向堆叠的多个存储单元，以及包括多个晶体管的外围电路区域，该多个晶体管通过 多条导线。 每个晶体管包括在第一方向上与衬底的有源区域交叉的栅极电极和位于栅极电极的相对侧的有源区域中的源极和漏极区域。 在至少一个晶体管中，连接到源极区的源极接触插塞的数量与连接到漏极区域的漏极接触插塞的数量不同。