公开(公告)号：US08290103B2

公开(公告)日：2012-10-16

申请号：US12601045

申请日：2008-05-23

申请人： Yihang Lu ,  Dangsheng Zhou ,  Zhihua Wang ,  Quanbo Xia ,  Bo Liu ,  Steve Moran ,  Chris Crawford ,  Brian Heber

发明人： Yihang Lu ,  Dangsheng Zhou ,  Zhihua Wang ,  Quanbo Xia ,  Bo Liu ,  Steve Moran ,  Chris Crawford ,  Brian Heber

IPC分类号： H04L7/00

CPC分类号： H04L12/40032 ,  H02J9/06 ,  H04L2012/40215 ,  Y10T307/62 ,  Y10T307/625

摘要： The present invention discloses a method for transmitting parallelization signals of uninterruptible power supplies, which firstly performs a serialization process on parallelization signals by a logic processing unit and then performs synchronous transmission of the parallelization signals of respective node units over a bus. The method for serial transmission of parallelization signals of uninterruptible power supplies according to the invention can be implemented with easy wiring and can achieve a strong anti-interference ability, ensure real time signal transmission over a guaranteed transmission distance and identify conveniently the failure of a parallelization line while satisfying fundamental transmission demands.

摘要翻译： 本发明公开了一种用于发送不间断电源的并行化信号的方法，该方法首先通过逻辑处理单元执行对并行化信号的串行化处理，然后通过总线执行各个节点单元的并行化信号的同步传输。 根据本发明的不间断电源的并行化信号的串行传输方法可以通过简单的布线来实现，并且可以实现强的抗干扰能力，确保在保证的传输距离上的实时信号传输，并且方便地识别并行化的故障 同时满足基本传输需求。

公开(公告)号：US06788559B2

公开(公告)日：2004-09-07

申请号：US10335231

申请日：2002-12-30

申请人： Xiaojun Sheng ,  Dangsheng Zhou

发明人： Xiaojun Sheng ,  Dangsheng Zhou

IPC分类号： H02M748

CPC分类号： H02M3/1584 ,  H02J1/102

摘要： The present invention relates to a switching synchronization method of parallel converter system, wherein one of converters is the host and the others are slave converters. The host converter includes a first timer and a pulse-transmitting device, and the slave converter includes a second timer, pulse capture device, and a synchronization adjustment. At a fixed time Tk1, the host converter sends a synchronization pulse to the synchronization bus through the pulse-transmitting device; and in the slave converter the second timer records the time Tx of the edge of the synchronization pulse received by the pulse capture device from the synchronization bus. The synchronization adjuster adjusts the second timer of the slave converter so as to synchronize it with the first timer of the host converter in accordance with the relationship between the times Tk1 and Tx; and then according to a predetermined protocol, the switching carrier timer of the slave converter so as to be adjusted to synchronize with the switching carrier timer of the host converter.

摘要翻译： 本发明涉及一种并行转换器系统的切换同步方法，其中转换器之一是主机，而其它转换器是从转换器。 主转换器包括第一定时器和脉冲发送装置，并且从转换器包括第二定时器，脉冲捕获装置和同步调整。 在固定时间Tk1，主机转换器通过脉冲发送装置向同步总线发送同步脉冲; 并且在从属转换器中，第二定时器记录脉冲捕获装置从同步总线接收的同步脉冲的边沿的时间Tx。 同步调整器调整从属转换器的第二定时器，以便根据时间Tk1和Tx之间的关系使其与主机转换器的第一定时器同步; 然后根据预定协议，从属转换器的切换载波定时器被调整以与主机转换器的切换载波定时器同步。

公开(公告)号：US20050041445A1

公开(公告)日：2005-02-24

申请号：US10500452

申请日：2002-12-31

申请人： Dangsheng Zhou

发明人： Dangsheng Zhou

IPC分类号： H02J1/10 ,  H02M7/48 ,  H02M7/493 ,  H02M1/00

CPC分类号： H02M7/493 ,  H02J1/102

摘要： This invention relates to a method of establishing a master unit in a multi-unit parallel system. Each module with a respective number is connected through a bus, and has a different host-identifying pulse width Ts and a host-releasing pulse width Tw. According to the respective numbers, each module sends its host-identifying pulse to the bus and receives the feedback pulse, and then establishes a master unit among all of modules after comparing the feedback pulse width Tr and the host-releasing pulse width Tw. This method effectively realizes a decentralized controlling strategy for phase synchronization in a parallel inverter system and ensures that only one master unit exists in the parallel system. The connection of the multi-string parallel signal bus is simple, and can be connected in circle to provide the redundancy. Compared with the prior art, it is much simple in structure and flexible in configuration and adjustment, and has more reliability and real-time capability.

摘要翻译： 本发明涉及在多单元并行系统中建立主单元的方法。 具有相应号码的每个模块通过总线连接，并且具有不同的主机识别脉冲宽度Ts和主机释放脉冲宽度Tw。 根据各自的编号，各模块将其主机识别脉冲发送给总线并接收反馈脉冲，然后在比较反馈脉冲宽度Tr和主机释放脉冲宽度Tw之后在所有模块中建立主单元。 该方法有效地实现了并联逆变器系统的相位同步分散控制策略，确保并行系统中只有一个主单元。 多串并行信号总线的连接简单，可以圆形连接，提供冗余。 与现有技术相比，结构简单，配置调整灵活，具有更高的可靠性和实时性。

公开(公告)号：US20110215772A1

公开(公告)日：2011-09-08

申请号：US13125723

申请日：2010-07-23

申请人： Xiaojun Sheng ,  Zhihua Wang ,  Quanbo Xia ,  Jianyou Zeng ,  Dangsheng Zhou ,  Ronghui Liao

发明人： Xiaojun Sheng ,  Zhihua Wang ,  Quanbo Xia ,  Jianyou Zeng ,  Dangsheng Zhou ,  Ronghui Liao

IPC分类号： H02P9/10

CPC分类号： H02P9/007 ,  H02P9/102

摘要： The invention discloses a power grid fault ride-through device and a method for a doubly fed induction generator. The device comprises a controller and a crowbar circuit, the controller is in controlled connection with a generator-side converter and a grid-side converter of the doubly fed induction generator and the crowbar circuit, a three-phase input end of the crowbar circuit is connected with a connection end of a du/dt inductance and the generator-side converter, the crowbar circuit comprises a switch circuit and a drive circuit which is in driving connection with the switch circuit, the controller is in controlled connection with the drive circuit, the switch circuit comprises a bridge circuit comprising full-controlled power electronic devices as constituent elements, and a three-phase input end of the switch circuit is connected to the three-phase input end of the crowbar circuit; and with the device, the method comprises the following steps of closing the generator-side converter and triggering the conduction of the switch circuit in case that a power grid dips to the condition that rotor current is equal to or larger than a conduction threshold value, and switching off the switch circuit in case that rotor current is equal to or smaller than a switch-off threshold value. The invention prolongs the service life of the crowbar circuit and improves the working reliability of the crowbar circuit, and has simple structure and easy implementation.

摘要翻译： 本发明公开了一种电网故障穿越装置和双馈感应发电机的方法。 该装置包括控制器和撬棍电路，控制器与双馈感应发电机和撬棒电路的发电机侧转换器和电网侧转换器控制连接，撬棒电路的三相输入端为 与du / dt电感的连接端和发生器侧转换器相连，撬棒电路包括开关电路和与开关电路驱动连接的驱动电路，控制器与驱动电路控制连接， 开关电路包括作为组成元件的全控电力电子装置的桥式电路，开关电路的三相输入端连接到短路电路的三相输入端; 并且利用该装置，该方法包括以下步骤：在电网下降到转子电流等于或大于导通阈值的条件的情况下闭合发电机侧转换器并触发开关电路的导通， 并且在转子电流等于或小于关断阈值的情况下关断开关电路。 本发明延长了撬棒电路的使用寿命，提高了撬棒电路的工作可靠性，结构简单，易于实现。

公开(公告)号：US20100239028A1

公开(公告)日：2010-09-23

申请号：US12601045

申请日：2008-05-23

申请人： Yihang Lu ,  Dangsheng Zhou ,  Zhihua Wang ,  Quanbo Xia ,  Bo Liu ,  Steve Moran ,  Chris Crawford ,  Brian Heber

发明人： Yihang Lu ,  Dangsheng Zhou ,  Zhihua Wang ,  Quanbo Xia ,  Bo Liu ,  Steve Moran ,  Chris Crawford ,  Brian Heber

IPC分类号： H04B3/00

CPC分类号： H04L12/40032 ,  H02J9/06 ,  H04L2012/40215 ,  Y10T307/62 ,  Y10T307/625

摘要： The present invention discloses a method for transmitting parallelization signals of uninterruptible power supplies, which firstly performs a serialization process on parallelization signals by a logic processing unit and then performs synchronous transmission of the parallelization signals of respective node units over a bus. The method for serial transmission of parallelization signals of uninterruptible power supplies according to the invention can be implemented with easy wiring and can achieve a strong anti-interference ability, ensure real time signal transmission over a guaranteed transmission distance and identify conveniently the failure of a parallelization line while satisfying fundamental transmission demands.

摘要翻译： 本发明公开了一种用于发送不间断电源的并行化信号的方法，该方法首先通过逻辑处理单元执行对并行化信号的串行化处理，然后通过总线执行各个节点单元的并行化信号的同步传输。 根据本发明的不间断电源的并行化信号的串行传输方法可以通过简单的布线来实现，并且可以实现强的抗干扰能力，确保在保证的传输距离上的实时信号传输，并且方便地识别并行化的故障 同时满足基本传输需求。

公开(公告)号：US07038923B2

公开(公告)日：2006-05-02

申请号：US10500452

申请日：2002-12-31

申请人： Dangsheng Zhou

发明人： Dangsheng Zhou

IPC分类号： H02M7/00 ,  H02M7/02

CPC分类号： H02M7/493 ,  H02J1/102

摘要： This invention relates to a method of establishing a master unit in a multi-unit parallel system. Each module with a respective number is connected through a bus, and has a different host-identifying pulse width Ts and a host-releasing pulse width Tw. According to the respective numbers, each module sends its host-identifying pulse to the bus and receives the feedback pulse, and then establishes a master unit among all of modules after comparing the feedback pulse width Tr and the host-releasing pulse width Tw. This method effectively realizes a decentralized controlling strategy for phase synchronization in a parallel inverter system and ensures that only one master unit exists in the parallel system. The connection of the multi-string parallel signal bus is simple, and can be connected in circle to provide the redundancy. Compared with the prior art, it is much simple in structure and flexible in configuration and adjustment, and has more reliability and real-time capability.

摘要翻译： 本发明涉及在多单元并行系统中建立主单元的方法。 具有相应号码的每个模块通过总线连接，并且具有不同的主机识别脉冲宽度Ts和主机释放脉冲宽度Tw。 根据各自的编号，各模块将其主机识别脉冲发送给总线并接收反馈脉冲，然后在比较反馈脉冲宽度Tr和主机释放脉冲宽度Tw之后在所有模块中建立主单元。 该方法有效地实现了并联逆变器系统中相位同步的分散控制策略，确保并行系统中只有一个主单元。 多串并行信号总线的连接简单，可以圆形连接，提供冗余。 与现有技术相比，结构简单，配置调整灵活，具有更高的可靠性和实时性。