公开(公告)号：US20060261884A1

公开(公告)日：2006-11-23

申请号：US11134122

申请日：2005-05-20

申请人： David Gammie ,  Sergey Alenin

发明人： David Gammie ,  Sergey Alenin

IPC分类号： H03F1/02

CPC分类号： H03F3/45192 ,  H03F3/45475 ,  H03F3/45973 ,  H03F2200/261 ,  H03F2203/45521

摘要： An amplifier circuit includes first (7A) and second (7B) operational amplifiers connected in a generally parallel configuration, each with inputs coupled through the same pair of matched input resistors which receive a differential input signal that may have both a positive and negative common mode range. An offset adjustment amplifier (17) receives a differential error signal representative of the difference between offset voltages of the first and second operational amplifiers and generates offset adjustment signals that are applied to input stages of the first and second operational amplifiers to adjust their respective offset voltages so as to equalize them. With the offset voltages equalized, the first and second operational amplifiers operate seamlessly as a common mode component of the differential input signal undergoes a transition from its positive to its negative range, so as to avoid inaccuracies and abrupt changes in an output voltage during the transition, the output voltage being produced in response to outputs of both first and second operational amplifiers.

摘要翻译： 放大器电路包括以大致平行配置连接的第一（7A）和第二（7B）运算放大器，每个具有通过同一对匹配输入电阻耦合的输入，其接收差分输入信号，所述差分输入信号可以具有正负两者 共模范围 偏移调整放大器（17）接收表示第一和第二运算放大器的偏移电压之差的差分误差信号，并产生施加到第一和第二运算放大器的输入级的偏移调整信号，以调整其偏移电压 以便平衡它们。 在偏移电压相等的情况下，第一和第二运算放大器无缝运行，因为差分输入信号的共模分量经历了从其正极到负极的转变，从而避免了转换期间输出电压的不准确和突然变化 ，输出电压是响应于第一和第二运算放大器的输出产生的。

公开(公告)号：US20060267687A1

公开(公告)日：2006-11-30

申请号：US11136221

申请日：2005-05-24

申请人： David Gammie ,  Edward Mullins ,  Jeffery Parfenchuck

发明人： David Gammie ,  Edward Mullins ,  Jeffery Parfenchuck

IPC分类号： H03F3/45

CPC分类号： H03F1/34 ,  H03F3/45475 ,  H03F2200/261 ,  H03F2200/513 ,  H03F2203/45418 ,  H03F2203/45604

摘要： An amplifier circuit includes first (7A) and second (7B) operational amplifiers connected in a parallel configuration. A first terminal (12) of a first input resistor (5) is coupled to one input of both of the first (7A) and second (7B) amplifiers. A first terminal (15) of a second input resistor (6) is coupled to another input of both of the first (7A) and second (7B) amplifiers. A differential input voltage is applied between the second terminals of the first and second input resistors. The output signals of the first (7A) and second (7B) operational amplifiers are combined to produce an output signal (11AB) representative of feedback currents produced in the first (5) and second (6) input resistors. Upper and lower common mode input voltage ranges associated with the differential input voltage extend substantially above and below the upper and lower supply voltages, respectively, of the amplifier circuit.

摘要翻译： 放大器电路包括以并联配置连接的第一（7A）和第二（7B）运算放大器。 第一输入电阻器（5）的第一端子（12）耦合到第一（7A）和第二（7B）放大器两者的一个输入端。 第二输入电阻器（6）的第一端子（15）耦合到第一（7A）和第二（7B）放大器两者的另一输入端。 差分输入电压施加在第一和第二输入电阻器的第二端子之间。 第一（7A）和第二（7B）运算放大器的输出信号被组合以产生代表在第一（5）和第二输入电阻器（6）中产生的反馈电流的输出信号（11AB）。 与差分输入电压相关联的上，下共模输入电压范围分别大致上升和低于放大器电路的上下电源电压。