公开(公告)号：US07433426B2

公开(公告)日：2008-10-07

申请号：US10831095

申请日：2004-04-23

申请人： Zhubiao Zhu ,  Kenneth Koch, II ,  David J. C. Johnson

发明人： Zhubiao Zhu ,  Kenneth Koch, II ,  David J. C. Johnson

IPC分类号： H03K9/00 ,  H04L27/00

CPC分类号： H04L25/063 ,  H03K5/082 ,  H03K5/1252

摘要： An adaptive hysteresis receiver processes a high speed digital signal. A differential receiver circuit compares the high speed digital signal to a reference voltage to generate an output signal. A register circuit latches the output signal, according to a clock signal, to produce a control signal. A reference voltage generator generates the reference voltage, from a plurality of voltages defining a deep hysteresis level and a shallow hysteresis level, in response to the output signal and the control signal.

摘要翻译： 自适应迟滞接收器处理高速数字信号。 差分接收器电路将高速数字信号与参考电压进行比较以产生输出信号。 寄存器电路根据时钟信号锁存输出信号以产生控制信号。 参考电压发生器响应于输出信号和控制信号从限定深滞后电平和浅滞后电平的多个电压产生参考电压。