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    Method and apparatus for determining a byte select vector for a crossbar shifter
    1.
    发明授权
    Method and apparatus for determining a byte select vector for a crossbar shifter 有权
    用于确定交叉开关移位器的字节选择矢量的方法和装置

    公开(公告)号：US06675181B1

    公开(公告)日：2004-01-06

    申请号：US09471878

    申请日：1999-12-23

    申请人： DeForest Tovey

    发明人： DeForest Tovey

    IPC分类号： G06F700

    CPC分类号： G06F5/01

    摘要： A method and apparatus for determining a byte select vector for a crossbar shifter include processing that begins by storing data in a first set of byte locations and in a second set of byte locations. Typically, a data operand is written into the first and a shift value is written into the second set of byte locations. The processing continues by obtaining a shift amount value for the data. The processing then continues by determining, for each byte multiplexor of a set of byte multiplexors associated with a corresponding output byte, whether a wrapped condition will occur based on the shift amount for the data. When the wrap condition occurs, a wrap shift amount is determined based on a mode of shifting. The processing then continues by generating a byte select vector for the set of byte multiplexors based on the wrap shift amount and the shift amount. The byte select vector includes a first nibble that is associated with a first one of the byte multiplexors and a second nipple that is associated with a second one of the byte multiplexors.

    摘要翻译： 用于确定交叉开关移位器的字节选择向量的方法和装置包括通过将数据存储在第一组字节位置和第二组字节位置中开始的处理。 通常，将数据操作数写入第一个数据操作数，并将移位值写入第二组字节位置。 通过获得数据的移位量值继续处理。 然后，通过针对与对应的输出字节相关联的一组字节多路复用器的每个字节多路复用器确定是否基于数据的移位量发生被包装的条件来继续处理。 当包装条件发生时，基于移动模式确定包装移动量。 然后，基于包装移位量和移位量，通过产生一组字节多路复用器的字节选择向量来继续处理。 所述字节选择向量包括与所述字节多路复用器中的第一字节多路复用器相关联的第一半字节和与所述字节多路复用器中的第二字节多路复用器相关联的第二管接头。

    Integrated circuit chip design
    3.
    发明授权
    Integrated circuit chip design 有权
    集成电路芯片设计

    公开(公告)号：US07243323B2

    公开(公告)日：2007-07-10

    申请号：US10231384

    申请日：2002-08-29

    申请人： Ted E. Williams ,  Jonathan Ferro ,  DeForest Tovey ,  Louis Tseng

    发明人： Ted E. Williams ,  Jonathan Ferro ,  DeForest Tovey ,  Louis Tseng

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5045 ,  G06F17/5031 ,  G06F17/5068 ,  G06F17/5077

    摘要： Method of developing a model of a circuit design including the steps of generating four different path-tracing runs, creating four arcs from the four different path-tracing runs, and combining the four arcs into two separate models. Also, a method of adjusting timing of a clock signal provided to a first block and a second block where data signals travel via a first path from the first block to the second block and data signals travel via a second path from the second block to the first block and the time for the data signals to travel the first path is greater than the time for the data signals to travel the second path. The clock signal provided to the second block relative to the clock signal provided to the first block is delayed by an amount that is a function of the difference between the time for the data signals to travel the first path and the time for the data signals to travel the second path.

    摘要翻译： 开发电路设计模型的方法，包括以下步骤：生成四个不同的路径跟踪运行，从四个不同的路径跟踪运行中创建四个弧，并将四个弧组合成两个单独的模型。 此外，一种调整提供给第一块的时钟信号的定时和数据信号经由第一路径从第一块传播到第二块的第二块的定时的方法，并且数据信号经由第二路径从第二块行进到 第一块和数据信号行进第一路径的时间大于数据信号行进第二路径的时间。 提供给第二块的相对于提供给第一块的时钟信号的时钟信号被延迟了作为数据信号行进第一路径的时间与数据信号的时间之间的差的函数的量 旅行第二条路。

    Method and apparatus for transposing bits
    4.
    发明授权
    Method and apparatus for transposing bits 有权
    用于转置位的方法和装置

    公开(公告)号：US06816593B1

    公开(公告)日：2004-11-09

    申请号：US09471350

    申请日：1999-12-23

    申请人： DeForest Tovey ,  Stephen C. Purcell

    发明人： DeForest Tovey ,  Stephen C. Purcell

    IPC分类号： H04L928

    CPC分类号： G06F13/4072 ,  G06F2221/2141

    摘要： A method and apparatus for transposing bits include processing that begins by receiving a multiple bit input. The multiple bit input may be received from memory for executing a read operation from a processing device or for a write operation to memory. The processing continues by determining whether a transposed bit function is enabled. When the transposed bit function is enabled, a set of tri-state transposed drivers are enabled to couple out bit lines to the multiple bit input in a transposed fashion. In addition, a set of tri-state non-transposed drivers are disabled such that they are not coupled to the output bit lines. When the transposed bit function is not enabled, the non-transposed drivers are enabled and the tri-state transposed drivers are disabled such that the multiple bit input, when coupled to the output bit lines, is not transposed.

    摘要翻译： 用于转置位的方法和装置包括通过接收多位输入开始的处理。 可以从存储器接收多位输入，以执行来自处理装置的读取操作或对存储器的写入操作。 通过确定转置位功能是否被使能来继续处理。 当转置位功能使能时，一组三态转置驱动器被使能，以转置方式将位线耦合到多位输入。 此外，一组三态非转置驱动器被禁用，使得它们不耦合到输出位线。 当转置位功能未使能时，非转置驱动器被使能，并且三态转置驱动器被禁止，使得当耦合到输出位线时，多位输入不被转置。

    Method and apparatus for arithmetic shifting
    7.
    发明授权
    Method and apparatus for arithmetic shifting 有权
    算术移位的方法和装置

    公开(公告)号：US06643673B1

    公开(公告)日：2003-11-04

    申请号：US09451638

    申请日：1999-11-30

    申请人： DeForest Tovey

    发明人： DeForest Tovey

    IPC分类号： G06F700

    CPC分类号： G06F9/30032 ,  G06F5/015 ,  G06F9/3875

    摘要： A method and apparatus for arithmetic shifting includes processing that begins by receiving a decoded instruction in a cycle of a pipeline process. Also during this cycle of the pipeline process, shift information and a data operand are determined based on the decoded instruction. In a subsequent cycle of the pipeline process, a data output is generated from the data operand based on the shift information using a crossbar shifting function.

    摘要翻译： 用于算术移位的方法和装置包括以流水线处理的循环中接收解码指令开始的处理。 同样在流水线处理的这个周期期间，基于解码的指令来确定移位信息和数据操作数。 在流水线处理的后续周期中，使用横杠移位功能，基于移位信息从数据操作数产生数据输出。